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XC7WH126

NXP

Dual buffer/line driver

XC7WH126 Dual buffer/line driver; 3-state Rev. 2 — 8 May 2013 Product data sheet 1. General description The XC7WH126 ...


NXP

XC7WH126

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Description
XC7WH126 Dual buffer/line driver; 3-state Rev. 2 — 8 May 2013 Product data sheet 1. General description The XC7WH126 is a high-speed Si-gate CMOS devices. This device provides a dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A LOW at nOE causes the output to assume a high-impedance OFF-state. 2. Features and benefits  Symmetrical output impedance  High noise immunity  Low power dissipation  Balanced propagation delays  Multiple package options  ESD protection:  HBM JESD22-A114E: exceeds 2000 V  MM JESD22-A115-A: exceeds 200 V  CDM JESD22-C101C: exceeds 1000 V  Specified from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description XC7WH126DP 40 C to +125 C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm XC7WH126DC 40 C to +125 C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm XC7WH126GD 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 3  2  0.5 mm Version SOT505-2 SOT765-1 SOT996-2 NXP Semiconductors XC7WH126 Dual buffer/line driver; 3-state 4. Marking Table 2. Marking codes Type number XC7WH126DP XC7WH126DC XC7WH126GD Marking[1] f26 f26 f26 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram ...




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