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HK24C32 Dataheets PDF



Part Number HK24C32
Manufacturers Hang Shun chip technology
Logo Hang Shun chip technology
Description Two-Wire Serial EEPROM
Datasheet HK24C32 DatasheetHK24C32 Datasheet (PDF)

Two-Wire Serial EEPROM 32K, 64K (8-bit wide) FEATURES  Low voltage and low power operations:  HK24C32/HK24C64: VCC = 1.8V to 5.5V  Maximum Standby current < 1µA (typically 0.02µA and 0.06µA @ 1.8V and 5.5V respectively).  32 bytes page write mode.  Partial page write operation allowed.  Internally organized: 4,096 × 8 (32K), 8,192 × 8 (64K).  Standard 2-wire bi-directional serial interface.  Schmitt trigger, filtered inputs for noise protection.  Self-timed Write Cycle (5ms m.

  HK24C32   HK24C32


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Two-Wire Serial EEPROM 32K, 64K (8-bit wide) FEATURES  Low voltage and low power operations:  HK24C32/HK24C64: VCC = 1.8V to 5.5V  Maximum Standby current < 1µA (typically 0.02µA and 0.06µA @ 1.8V and 5.5V respectively).  32 bytes page write mode.  Partial page write operation allowed.  Internally organized: 4,096 × 8 (32K), 8,192 × 8 (64K).  Standard 2-wire bi-directional serial interface.  Schmitt trigger, filtered inputs for noise protection.  Self-timed Write Cycle (5ms maximum).  800 kHz (5V), 400 kHz (1.8V, 2.5V, 2.7V) Compatibility.  Automatic erase before write operation.  Write protect pin for hardware data protection.  High reliability: typically 1, 000,000 cycles endurance.  100 years data retention.  Industrial temperature range (-40℃ to 85℃).  Standard 8-lead DIP/SOP/ MSOP/TSSOP/DFN and 5-lead SOT23/TSOT23 Pb-free packages. DESCRIPTION The HK24C32/24C64 series are 32,768/65,536 bits of serial Electrical Erasable and Programmable Read Only Memory, commonly known as EEPROM. They are organized as 4096/8192 words of 8 bits (one byte) each. The devices are fabricated with proprietary advanced CMOS process for low power and low voltage applications. These devices are available in standard 8-lead DIP, 8-lead SOP, 8-lead MSOP, 8-lead TSSOP, 8-lead DFN, 5-lead SOT23, and 5-lead TSOT23 packages. A standard 2-wire serial interface is used to address all read and write functions. Our extended VCC range (1.8V to 5.5V) devices enables wide spectrum of applications. PIN CONFIGURATION Pin Name A2, A1, A0 SDA SCL WP NC Pin Function Device Address Inputs Serial Data Input / Open Drain Output Serial Clock Input Write Protect No-Connect All these packaging types come in Pb-free certified. H K 24C32/H K 24C64 A0 A1 A2 GND 1 2 3 4 8 VCC 7 WP 6 SCL 5 SDA 8L DIP 8L SOP 8L MSOP 8L TSSOP 8L DFN H K 24C32/H K 24C64 SCL GND SDA 1 2 3 5 WP 4 VCC 5L SOT23 5L TSOT23 ABSOLUTE MAXIMUM RATINGS Industrial operating temperature: Storage temperature: Input voltage on any pin relative to ground: Maximum voltage: ESD Protection on all pins: -40℃ to 85℃ -50℃ to 125℃ -0.3V to VCC + 0.3V 8V >2000V * Stresses exceed those listed under “Absolute Maximum Rating” may cause permanent damage to the device. Functional operation of the device at conditions beyond those listed in the specification is not guaranteed. Prolonged exposure to extreme conditions may affect device reliability or functionality. PIN DESCRIPTIONS (A) SERIAL CLOCK (SCL) The rising edge of this SCL input is to latch data into the EEPROM device while the falling edge of this clock is to clock data out of the EEPROM device. (B) DEVICE / CHIP SELECT ADDRESSES (A2, A1, A0) These are the chip select input signals for the serial EEPROM devices. Typically, these signals are hardwired to either VIH or VIL. If left unconnected, they are internally recognized as VIL. (C) SERIAL DATA LINE (SDA) SDA data line is a bi-directional signal for the serial devices. It is an open drain output signal and can be wired-OR with other open-drain output devices. (D) WRITE PROTECT (WP) The HK24C32/24C64 devices have a WP pin to protect the whole EEPROM array from programming. Programming operations are allowed if WP pin is left un-connected or input to VIL. Conversely all programming functions are disabled if WP pin is connected to VIH or VCC. Read operations is not affected by the WP pin’s input level. MEMORY ORGANIZATION The HK24C32/24C64 devices have 128/256 pages respectively. Since each page has 32 bytes, random word addressing to HK24C32/24C64 will require 12/13 bitsdata word addresses respectively. DEVICE OPERATION (A) SERIAL CLOCK AND DATA TRANSITIONS The SDA pin is typically pulled to high by an external resistor. Data is allowed to change only when Serial clock SCL is at VIL. Any SDA signal transition may interpret as either a START or STOP condition as described below. (B) START CONDITION With SCL  VIH, a SDA transition from high to low is interpreted as a START condition. All valid commands must begin with a START condition. (C) STOP CONDITION With SCL  VIH, a SDA transition from low to high is interpreted as a STOP condition. All valid read or write commands end with a STOP condition. The device goes into the STANDBY mode if it is after a read command. A STOP condition after page or byte write command will trigger the chip into the STANDBY mode after the self-timed internal programming finish (see Figure 1). (D) ACKNOWLEDGE The 2-wire protocol transmits address and data to and from the EEPROM in 8 bit words. The EEPROM acknowledges the data or address by outputting a "0" after receiving each word. The ACKNOWLEDGE signal occurs on the 9th serial clock after each word. (E) STANDBY MODE The EEPROM goes into low power STANDBY mode after a fresh power up, after receiving a STOP bit in read mode, or after completing a self-time internal programming operation. Figure 1: Timing diagram for START and STOP conditions SCL SDA START Conditio.


C1306 HK24C32 HK24C64


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