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74HCT4060-Q100 Dataheets PDF



Part Number 74HCT4060-Q100
Manufacturers NXP
Logo NXP
Description 14-stage binary ripple counter
Datasheet 74HCT4060-Q100 Datasheet74HCT4060-Q100 Datasheet (PDF)

74HC4060-Q100; 74HCT4060-Q100 14-stage binary ripple counter with oscillator Rev. 2 — 10 April 2013 Product data sheet 1. General description The 74HC4060-Q100; 74HCT4060-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC4060-Q100; 74HCT4060-Q100 are 14-stage ripple-carry counter/dividers and oscillators with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (Q3 to Q9 and Q11.

  74HCT4060-Q100   74HCT4060-Q100



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74HC4060-Q100; 74HCT4060-Q100 14-stage binary ripple counter with oscillator Rev. 2 — 10 April 2013 Product data sheet 1. General description The 74HC4060-Q100; 74HCT4060-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC4060-Q100; 74HCT4060-Q100 are 14-stage ripple-carry counter/dividers and oscillators with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. In this case keep the other oscillator pins (RTC and CTC) floating. The counter advances on the negative-going transition of RS. A HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of other input conditions. In the HCT version, the MR input is TTL compatible, but the RS input has CMOS input switching levels and can be driven by a TTL output by using a pull-up resistor to VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits  Automotive product qualification in accordance with AEC-Q100 (Grade 1)  Specified from 40 C to +85 C and from 40 C to +125 C  All active components on chip  RC or crystal oscillator configuration  ESD protection:  MIL-STD-883, method 3015 exceeds 2000 V  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  Multiple package options 3. Applications  Control counters  Timers  Frequency dividers  Time-delay circuits NXP Semiconductors 74HC4060-Q100; 74HCT4060-Q100 14-stage binary ripple counter with oscillator 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC4060D-Q100 40 C to +125 C 74HCT4060D-Q100 SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HC4060DB-Q100 40 C to +125 C 74HCT4060DB-Q100 SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 74HC4060PW-Q100 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1 body width 4.4 mm 74HC4060BQ-Q100 40 C to +125 C 74HCT4060BQ-Q100 DHVQFN16 plastic dual in-line compatible thermal-enhanced SOT763-1 very thin quad flat package; no leads; 16 terminals; body 2.5  3.5  0.85 mm 5. Functional diagram Fig 1. Logic symbol 11 RS 12 MR 10 9 RTC CTC Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q11 Q12 Q13 7 5 4 6 14 13 15 1 2 3 001aai467 9 10 11 12 Fig 2. IEC logic symbol 74HC_HCT4060_Q100 Product data sheet CTR14 !G CX 37 5 RX + 4 RCX 6 11 14 12 CT 13 CT = 0 9 15 11 1 2 13 3 (a) CTR14 3 AND + CT CT = 0 9 11 13 7 5 4 6 14 13 15 1 2 3 (b) 001aai468 All information provided in this document.


74HC4060-Q100 74HCT4060-Q100 EFM32G880


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