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DG542 Dataheets PDF



Part Number DG542
Manufacturers Vishay
Logo Vishay
Description Wideband/Video T Switches
Datasheet DG542 DatasheetDG542 Datasheet (PDF)

DG540, DG541, DG542 Vishay Siliconix Wideband/Video “T” Switches DESCRIPTION The DG540, DG541, DG542 are high performance monolithic wideband/video switches designed for switching RF, video and digital signals. By utilizing a "T" switch configuration on each channel, these devices achieve exceptionally low crosstalk and high off-isolation. The crosstalk and off-isolation of the DG540 are further improved by the introduction of extra GND pins between signal pins. To achieve TTL compatibility, lo.

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DG540, DG541, DG542 Vishay Siliconix Wideband/Video “T” Switches DESCRIPTION The DG540, DG541, DG542 are high performance monolithic wideband/video switches designed for switching RF, video and digital signals. By utilizing a "T" switch configuration on each channel, these devices achieve exceptionally low crosstalk and high off-isolation. The crosstalk and off-isolation of the DG540 are further improved by the introduction of extra GND pins between signal pins. To achieve TTL compatibility, low channel capacitances and fast switching times, the DG540 family is built on the Vishay Siliconix proprietary D/CMOS process. Each switch conducts equally well in both directions when on. FEATURES • Halogen-free according to IEC 61249-2-21 Definition • Wide Bandwidth: 500 MHZ • Low Crosstalk: - 85 dB • High Off-Isolation: - 80 dB at 5 MHz • "T" Switch Configuration • TTL and CMOS Logic Compatible • Fast Switching - tON: 45 ns • Low RDS(on): 30  • Compliant to RoHS Directive 2002/95/EC BENEFITS • Flat Frequency Response • High Color Fidelity • Low Insertion Loss • Improved System Performance • Reduced Board Space • Reduced Power Consumption • Improved Data Throughput APPLICATIONS • RF and Video Switching • RGB Switching • Local and Wide Area Networks • Video Routing • Fast Data Acquisition • ATE • Radar/FLR Systems • Video Multiplexing FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION IN1 1 DG540 Dual-In-Line 20 IN2 DG540 PLCC GND D1 IN 1 IN 2 D2 D1 2 19 D2 3 2 1 20 19 GND 3 S1 4 V- 5 GND 6 S4 7 18 GND 17 S2 16 V+ S1 VGND 4 5 6 15 GND S4 7 14 S3 GND 8 18 GND 17 S2 16 V+ 15 GND 14 S3 GND 8 D4 9 13 GND 1 2 D3 9 10 11 12 13 D4 IN4 IN3 D3 GND IN4 10 11 IN3 Top View Top View TRUTH TABLE Logic 0 1 Logic “0” 0.8 V Logic “1” 2 V Switch OFF ON Document Number: 70055 www.vishay.com S11-1429–Rev. H, 18-Jul-11 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG540, DG541, DG542 Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION DG541 Dual-In-Line and SOIC IN1 D1 S1 VGND S4 D4 IN4 1 2 3 4 5 6 7 8 Top View 16 IN2 15 D2 14 S2 13 V+ 12 GND 11 S3 10 D3 9 IN3 TRUTH TABLE - DG541 Logic 0 1 Logic "0" 0.8 V Logic "1" 2 V Switch OFF ON DG542 Dual-In-Line and SOIC IN1 D1 GND S1 VS4 GND D4 1 2 3 4 5 6 7 8 Top View 16 IN2 15 D2 14 GND 13 S2 12 V+ 11 S3 10 GND 9 D3 TRUTH TABLE - DG542 Logic 0 SW1, SW2 OFF 1 ON Logic "0" 0.8 V Logic "1" 2 V SW3, SW4 ON OFF ORDERING INFORMATION Temp Range DG540 - 40 to 85 °C Package 20-Pin Plastic DIP 20-Pin PLCC - 55 to 125 °C 20-Pin Sidebraze DG541 - 40 to 85 °C 16-Pin Plastic DIP 16-Pin Narrow SOIC - 55 to 125 °C 16-Pin Sidebraze DG542 - 40 to 85 °C 16-Pin Plastic DIP 16-Pin Narrow SOIC - 55 to 125 °C 16-Pin Sidebraze Part Number DG540DJ-E3 DG540DN-E3 DG540AP DG540AP/883 DG541DJ-E3 DG541DY-T1-E3 DG541AP DG541AP/883, 5962-9076401MEA DG542DJ-E3 DG542DY-T1-E3 DG542AP DG542AP/883, 5962-91555201MEA www.vishay.com Document Number: 70055 2 S11-1429–Rev. H, 18-Jul-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG540, DG541, DG542 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted) Parameter Symbol Limit V+ to V- - 0.3 to 21 V+ to GND - 0.3 to 21 V- to GND - 19 to + 0.3 Digital Inputs (V-) - 0.3 to (V+) + 0.3 or 20 mA, whichever occurs first VS, VD (V-) - 0.3 to (V+) + 14 or 20 mA, whichever occurs first Continuous Current (Any Terminal) 20 Current, S or D (Pulsed at 1 ms, 10 % duty cycle max) 40 Storage Temperature (AP Suffix) (DJ, DN, DY Suffixes) - 65 to 150 - 65 to 125 Power Dissipation (Package)a 16-Pin Plastic DIPb 20-Pin Plastic DIPc 16-Pin Narrow Body SOICd 20-Pin PLCCd 16-, 20-Pin Sidebraze DIPe 470 800 640 800 900 Notes: a. All leads welded or soldered to PC Board. b. Derate 6.5 mW/°C above 25 °C. c. Derate 7 mW/°C above 25 °C. d. Derate 10 mW/°C above 75 °C. e. Derate 12 mW/°C above 75 °C. Unit V mA °C mW SCHEMATIC DIAGRAM (typical channel) V+ GND VREF IN + S D VFigure 1. Document Number: 70055 www.vishay.com S11-1429–Rev. H, 18-Jul-11 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DG540, DG541, DG542 Vishay Siliconix SPECIFICATIONSa Parameter Symbol Test Conditions Unless Specified V+ = 15 V, V- = - 3 V VINH = 2 V, VINL = 0.8 Vf A Suffix D Suffixes - 55 °C to 125 °C - 40 °C to 85 °C Temp.b Typ.c Min.d Max.d Min.d Max.d Unit Analog Switch Analog Signal Range Drain-Source On-Resistance RDS(on) Match Source Off Leakage Current VANALOG RDS(on) RDS(on) IS(off) V- = - 5 V, V+ = 12 IS = - 10 mA, VD = 0 V VS = 0 V, VD = 10 V Full Room Full Room Room Full 30.


DG541 DG542 BUK6209-30C


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