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AD9154 Dataheets PDF



Part Number AD9154
Manufacturers Analog Devices
Logo Analog Devices
Description Digital-to-Analog Converter
Datasheet AD9154 DatasheetAD9154 Datasheet (PDF)

Data Sheet Quad, 16-Bit, 2.4 GSPS, TxDAC+® Digital-to-Analog Converter AD9154 FEATURES Supports input data rates up to 1.096 GSPS Proprietary, low spurious and distortion design Single carrier LTE 20 MHz bandwidth (BW), ACLR = 77 dBc at 180 MHz IF Six carrier GSM IMD = 78 dBc, 600 kHz carrier spacing at 180 MHz IF SFDR = 72 dBc at 180 MHz IF, −6 dBFS single tone Flexible 8-lane JESD204B interface Multiple chip synchronization Fixed latency Data generator latency compensation Input signal power.

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Data Sheet Quad, 16-Bit, 2.4 GSPS, TxDAC+® Digital-to-Analog Converter AD9154 FEATURES Supports input data rates up to 1.096 GSPS Proprietary, low spurious and distortion design Single carrier LTE 20 MHz bandwidth (BW), ACLR = 77 dBc at 180 MHz IF Six carrier GSM IMD = 78 dBc, 600 kHz carrier spacing at 180 MHz IF SFDR = 72 dBc at 180 MHz IF, −6 dBFS single tone Flexible 8-lane JESD204B interface Multiple chip synchronization Fixed latency Data generator latency compensation Input signal power detection High performance, low noise phase-locked loop (PLL) clock multiplier Digital inverse sinc filter Digital quadrature modulation using a numerically controlled oscillator (NCO) Nyquist band selection—mix mode Selectable 1×, 2×, 4×, and 8× interpolation filters Low power: 2.11 W at 1.6 GSPS, full operating conditions 88-lead, exposed pad LFCSP APPLICATIONS Wireless communications Multicarrier LTE and GSM base stations Wideband repeaters Software defined radios Wideband communications Point to point microwave radio Transmit diversity, multiple input/multiple output (MIMO) Instrumentation Automated test equipment GENERAL DESCRIPTION The AD9154 is a quad, 16-bit, high dynamic range digital-toanalog converter (DAC) that provides a maximum sample rate of 2.4 GSPS, permitting multicarrier generation up to the Nyquist frequency in baseband mode. The AD9154 includes features optimized for direct conversion transmit applications, including complex digital modulation, input signal power detection, and gain, phase, and offset compensation. The DAC outputs are optimized to interface seamlessly with the ADRF6720-27 radio frequency quadrature modulator (AQM) from Analog Devices, Inc. In mix mode, the AD9154 DAC can reconstruct carriers in the second and third Nyquist zones. A serial port interface (SPI) provides the programming/readback of internal parameters. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. FUNCTIONAL BLOCK DIAGRAM QUAD MOD ADRF6720-27 DAC RF OUTPUT 0°/90° PHASE SHIFTER LPF DAC JESD204B SYNCOUTx± SYSREF LO_IN MOD_SPI QUAD MOD ADRF6720-27 QUAD DAC DAC RF OUTPUT 1 0°/90° PHASE LPF SHIFTER LO_IN DAC AD9154 MOD_SPI DAC DAC CLOCK SPI Figure 1. JESD204B SYNCOUTx± 11389-101 The full-scale output current can be programmed over a range of 4 mA to 20 mA. The AD9154 is available in two different 88-lead LFCSP packages. PRODUCT HIGHLIGHTS 1. Ultrawide signal bandwidth enables emerging wideband and multiband wireless applications. 2. Advanced low spurious and distortion design techniques provide high quality synthesis of wideband signals from baseband to high intermediate frequencies. 3. JESD204B Subclass 1 support simplifies multichip synchronization. 4. Small package size with a 12 mm × 12 mm footprint. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2015–2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD9154 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Link Latency Setup..................................................................... 30 Applications....................................................................................... 1 Crossbar Setup ............................................................................ 32 Functional Block Diagram .............................................................. 1 JESD204B Serial Data Interface.................................................... 33 General Description ......................................................................... 1 JESD204B Overview .................................................................. 33 Product Highlights ........................................................................... 1 Physical Layer ............................................................................. 34 Revision History ............................................................................... 3 Data Link Layer .......................................................................... 37 Detailed Functional Block Diagram .............................................. 4 Transport Layer .......................................................................... 45 Specifications..................................................................................... 5 JESD204B Test Modes ............................................................... 58 DC Specificat.


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