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Data Sheet
FEATURES
Wide input voltage range: 4.5 V to 15.5 V ±1.5% output accuracy over full temperature range 250 kHz to 2 MHz adjustable switching frequency with
individual ½× frequency option Power regulation
Channel 1 and Channel 2 Programmable 2 A/4 A/6 A sync buck regulators with low-side FET drivers
Channel 3 and Channel 4: 2.5 A sync buck regulators Flexible parallel operation
Single 12 A output (Channel 1 and Channel 2 in parallel) Single 5 A output (Channel 3 and Channel 4 in parallel) Low 1/f noise density 40 μV rms at 0.8 VREF for 10 Hz to 100 kHz Precision enable with 0.811 V accurate threshold Active output discharge switch FPWM/PSM mode selection Frequency synchronization input or output Power-good flag for Channel 1 output UVLO, OCP, and TSD protection 48-lead, 7 mm × 7 mm LFCSP −40°C to +125°C operational junctional temperature range
APPLICATIONS
FPGA and processor applications Small cell base stations Security and surveillance Medical applications
GENERAL DESCRIPTION
The ADP5054 combines four high performance buck regulators in a 48-lead LFCSP package that meets demanding performance and board space requirements. The device enables direct connection to high input voltages of up to 15.5 V with no preregulators.
Channel 1 and Channel 2 integrate high-side power metal-oxide semiconductor field effect transistors (MOSFETs ) and low-side MOSFET drivers. External NFETs can be used in low-side power devices to achieve an efficiency optimized solution and to deliver a programmable output current of 2 A, 4 A, or 6 A. Combining Channel 1 and Channel 2 in a parallel configuration provides a single output with up to 12 A of current.
Channel 3 and Channel 4 integrate both high-side and low-side MOSFETs to deliver an output current of 2.5 A. Combining Channel 3 and Channel 4 in a parallel configuration can provide a single output with up to 5 A of current.
Rev. G
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Quad Buck Regulator Integrated Power Solution
ADP5054
TYPICAL APPLICATION CIRCUIT
VREG C1 VDD
C0
4.5V TO 15.5V
PVIN1
C2 COMP1
EN1
VREG CFG12
(SS, 1/2 × fSW, PARALLEL)
C5 PVIN2
COMP2
EN2
PWRGD PVIN3
C8 COMP3
EN3
VREG CFG34 (SS, 1/2 × fSW,
PARALLEL, SCLKSET)
PVIN4 C11 COMP4
EN4
SELECTIVE
ADP5054
INTERNAL VREG 100mA
OSCILLATOR
CHANNEL 1 BUCK
(2A/4A/6A)
VREG
CHANNEL 2 BUCK
(2A/4A/6A)
VREG
SYNC/MODE RT
FB1 BST1 SW1
C3
DL1
Q1
ILIM2 ILIM1
PGND
DL2 SW2
Q2
BST2 FB2
C6
L1 L2
CHANNEL 3 BUCK (2.5A)
BST3 SW3
C9
FB3 PGND3
L3
VOUT1 C4
VOUT2 C7
VOUT3 C10
CHANNEL 4 BUCK (2.5A)
BST4 SW4 C12
FB4 PGND4
L4
VOUT4 C13
EXPOSED PAD
Figure 1.
The switching frequency of the ADP5054 can be programmed or synchronized to an external clock from 250 kHz to 2 MHz, and an individual ½× frequency configuration is available for each channel.
The ADP5054 contains an individual precision enable pin on each channel for easy power-up sequencing. The internal low 1/f noise reference is implemented in the ADP5054 for noise sensitive applications.
Table 1. Related Products
Model Channels
I2C Package
ADP5050 Four bucks, one LDO
Yes 48-Lead LFCSP
ADP5051 Four bucks, supervisory Yes 48-Lead LFCSP
ADP5052 Four bucks, one LDO
No 48-Lead LFCSP
ADP5053 Four bucks, supervisory No 48-Lead LFCSP
ADP5054 Four high current bucks No 48-Lead LFCSP
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ADP5054
TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Typical Application Circuit ............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 3 Detailed Functional Block Diagram .............................................. 4 Specifications..................................................................................... 5
Buck Regulator Specifications .................................................... 6 Absolute Maximum Ratings............................................................ 8
Thermal Resistance ...................................................................... 8 ESD Caution...............................................