Document
DESCRIPTION
EM78267/467A/B/C 8-BIT MICRO-CONTROLLER FOR TELECOM PRODUCT
Preliminary
The EM78267/467 A/B/C is an 8-bit microprocessor with low-power, high speed CMOS technology. Integrated onto a single chip are on-chip watchdog timer (WDT), RAM, ROM, programmable real time clock/counter, power down mode and bi-directional tri-state I/O ports. It can be developed as cordless phone or other applications.
FEATURES
• Operating voltage range: 2.5V~5.5V
• Available in temperature range: 0°C~70°C
• Operating frequency range:
Crystal Type: DC~20MHz at 5V
DC~8MHz at 3V
RC Type:
DC~4MHz at 5V
DC~4MHz at 3V
• 2Kx13 on chip ROM (EM78267A/B/C)
• 4Kx13 on chip ROM (EM78467A/B/C)
• 9 special function registers
• 148x8 general purpose registers (SRAM)
• 3 bi-directional tri-state I/O ports (20 I/O pins for EM78267/467A) (24 I/O pins for EM78267/467B)
(22 I/O pins for EM78267/467C)
• 5 level stack for subroutine nesting
• 8-bit real time clock/counter (TCC) with selective signal sources and trigger edges, and with overflow interrupt
• Selectable oscillator options:
XTAL1 type (High frequency)
XTAL2 type (32.768KHz)
RC type
External clock input
• Two oscillator periods per instruction cycle
• Power down mode
• Programmable wake up from sleep circuit on I/O ports
• Programmable free running on-chip watchdog timer
• Ten pull-up and wake-up pins
• Two open-drain pins
• Two R-option pins
• Interrupt function available
• 28 pin DIP, SOIC, SSOP
(EM78267/467A)
28 pin SOIC
(EM78267/467C)
32 pin DIP, SOIC
(EM78267/467B)
* This specification are subject to be changed without notice.
9.30.1997 1
PIN ASSIGNMENTS
EM78267/467A/B/C 8-BIT MICRO-CONTROLLER FOR TELECOM PRODUCT
Preliminary
EM78267A EM78467A
TCC VDD
NC VSS /INT P50 P51 P52 P53 P60 P61 P62 P63 P64
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 /RESET 27 OSCI 26 OSCO 25 P77 24 P76 23 P75 22 P74 21 P73 20 P72 19 P71 18 P70 17 P67 16 P66 15 P65
DIP, SOIC
EM78267A EM78467A
VSS TCC VDD VDD P50 P51 P52 P53 P60 P61 P62 P63 P64 VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 /RESET 27 OSCI 26 OSCO 25 P77 24 P76 23 P75 22 P74 21 P73 20 P72 19 P71 18 P70 17 P67 16 P66 15 P65
SSOP
EM78267B EM78467B
P55 P54 TCC VDD NC VSS /INT P50 P51 P52 P53 P60 P61 P62 P63 P64
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 P56 31 P57 30 /RESET 29 OSCI 28 OSCO
27 P77
26 P76 25 P75 24 P74 23 P73 22 P72 21 P71 20 P70
19 P67 18 P66 17 P65
DIP, SOIC
EM78267C EM78467C
P55 P54 TCC VDD VSS P50 P51 P52 P53 P60 P61 P62 P63 P64
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 /RESET 27 OSCI 26 OSCO 25 P77 24 P76 23 P75 22 P74 21 P73 20 P72 19 P71 18 P70 17 P67 16 P66 15 P65
SOIC
FUNCTIONAL BLOCK DIAGRAM
OSCI OSCO /RESET
TCC /INT
Oscillator/Timing Control
WDT Timer
Control of sleep and wake-up on I/O ports
R1(TCC)
WDT Timeout
Prescaler
RAM
R4
Interrupt Controller
ROM
Instruction register
Instruction Decoder
R2 Stack ALU
R3 ACC
P70 ~ P77
DATA & CONTROL BUS
IOC7 R7
I/O
PORT 7
IOC5 R5
I/O
PORT 5
P50 ~ P57
IOC6 R6.