SI53340

Si53340-45 Data Sheet Low-Jitter LVDS Fanout Clock Buffers with up to 10 LVDS Outputs from Any-Format Input and Wide Frequency Range from dc up to 1250 MHz The Si53340-45 family of LVDS fanout buffers is ideal for clock/data distribution and redundant clocking applications. These devices feature typical ultra-low jitter of 50 fs and operate over a wide frequency range from dc to 1250 MHz. Built-in LDOs deliver high PSRR performance and reduces the need for external components simplifying low jitter clock distribution in noisy environments. They are available in multiple configurations and offer a selectable input clock using a 2:1 input mux. Other features include independent output enable and built-in format translation. These buffers can be paired with the Si534x clocks and Si5xx oscillators to deliver end-to-end clock tree performance. KEY FEATURES Ultra-low additive jitter: 50 fs rms Built-in LDOs for high PSRR performance Up to 10 LVDS Outputs Any-format Inputs (LVPECL, Low-Power LVPECL, LVDS, CML, HCSL, LVCMOS) Wide frequency range: dc to 1250 MHz Output Enable option Multiple configuration options 2:1 Input Mux RoHS compliant, Pb-free Temperature range: –40 to +85 °C CLK0* CLK1* CLK_SEL VDD Power Supply Filtering 4 03 3 1 4 Outputs Si53340/41 VDDOA OEAb 3 Outputs 3 Outputs OEBb VDDOB Si53342/43 10 10 Outputs Si53344/45 *Si53341/43/45 require Single-ended Inputs silabs.com | Smart. Connected. Energy-friendly. Rev. 1.2 1. Ordering Guide ...