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power switch. NX5P1100 Datasheet

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power switch. NX5P1100 Datasheet






NX5P1100 switch. Datasheet pdf. Equivalent




NX5P1100 switch. Datasheet pdf. Equivalent





Part

NX5P1100

Description

Logic controlled high-side power switch



Feature


NX5P1100 Logic controlled high-side powe r switch Rev. 1 — 21 March 2014 Prod uct data sheet 1. General description The NX5P1100 is an advanced power switc h and ESD-protection device for USB OTG applications. It includes under voltag e and over voltage lockout, over-curren t, over-temperature, reverse bias and i n-rush current protection circuits. The se circuits are desi.
Manufacture

NXP

Datasheet
Download NX5P1100 Datasheet


NXP NX5P1100

NX5P1100; gned to isolate a VBUS OTG voltage sourc e from a VBUS interface pin automatical ly when a fault condition occurs. The d evice features two power switch termina ls, one input (VINT) and one output (VB US). It has a current limit input (ILIM ) for defining the over-current and in- rush current limit. A voltage detect ou tput (VDET) is used to determine when V INT is in the corr.


NXP NX5P1100

ect voltage range. An open-drain fault o utput (FAULT) indicates when a fault co ndition has occurred, and an enable inp ut (EN) controls the state of the switc h. When EN is set LOW the device enters a low-power mode, disabling all protec tion circuits except the undervoltage l ockout. The low-power mode can be enter ed at anytime unless the over temperatu re protection circ.


NXP NX5P1100

uit has been triggered. Designed for ope ration from 3 V to 5.5 V, it is used in power domain isolation applications to protect from out of range operation. T he enable input includes integrated log ic level translation making the device compatible with lower voltage processor s and controllers. 2. Features and bene fits  Wide supply voltage range from 3 V to 5.5 V  30 V.

Part

NX5P1100

Description

Logic controlled high-side power switch



Feature


NX5P1100 Logic controlled high-side powe r switch Rev. 1 — 21 March 2014 Prod uct data sheet 1. General description The NX5P1100 is an advanced power switc h and ESD-protection device for USB OTG applications. It includes under voltag e and over voltage lockout, over-curren t, over-temperature, reverse bias and i n-rush current protection circuits. The se circuits are desi.
Manufacture

NXP

Datasheet
Download NX5P1100 Datasheet




 NX5P1100
NX5P1100
Logic controlled high-side power switch
Rev. 1 — 21 March 2014
Product data sheet
1. General description
The NX5P1100 is an advanced power switch and ESD-protection device for USB OTG
applications. It includes under voltage and over voltage lockout, over-current,
over-temperature, reverse bias and in-rush current protection circuits. These circuits are
designed to isolate a VBUS OTG voltage source from a VBUS interface pin automatically
when a fault condition occurs. The device features two power switch terminals, one input
(VINT) and one output (VBUS). It has a current limit input (ILIM) for defining the
over-current and in-rush current limit. A voltage detect output (VDET) is used to determine
when VINT is in the correct voltage range. An open-drain fault output (FAULT) indicates
when a fault condition has occurred, and an enable input (EN) controls the state of the
switch. When EN is set LOW the device enters a low-power mode, disabling all protection
circuits except the undervoltage lockout. The low-power mode can be entered at anytime
unless the over temperature protection circuit has been triggered.
Designed for operation from 3 V to 5.5 V, it is used in power domain isolation applications
to protect from out of range operation. The enable input includes integrated logic level
translation making the device compatible with lower voltage processors and controllers.
2. Features and benefits
Wide supply voltage range from 3 V to 5.5 V
30 V tolerant on VBUS
ISW maximum 1 A continuous current
Very low ON resistance: 100 m(maximum) at a supply voltage of 4.0 V
Low-power mode (ground current 20 A typical)
1.8 V control logic
Soft start turn-on slew rate
Protection circuitry
Over-temperature protection
Over-current protection with low current output mode
Reverse bias current/Back drive protection
Overvoltage lockout
Undervoltage lockout
Analog voltage limited VBUS monitor path
ESD protection:
HBM ANSI/ESDA/JEDEC JDS-001 Class 2 exceeds 2 kV
CDM AEC standard Q100-011 category C6 exceeds 1 kV
IEC61000-4-2 contact discharge exceeds 8 kV for pins VBUS, D, D+ and ID
Specified from 40 C to +85 C




 NX5P1100
NXP Semiconductors
NX5P1100
Logic controlled high-side power switch
3. Applications
USB OTG applications
4. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
NX5P1100UK 40 C to +85 C
WLCSP12 wafer level chip-scale package; 12 bumps;
1.36 x 1.66 x 0.51 mm, 0.4 mm pitch (Backside coating
included)
5. Marking
Table 2. Marking codes
Type number
NX5P1100UK
6. Functional diagram
Marking code
NX5PB
Version
NX5P1100
Fig 1. Logic symbol
9%86
'
'
,'
(1
9,17
9'(7
,/,0
)$8/7
DDD
NX5P1100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 21 March 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
2 of 20




 NX5P1100
NXP Semiconductors
NX5P1100
Logic controlled high-side power switch
9%86
'
'
,'
Fig 2. Logic diagram (simplified schematic)
7. Pinning information
7.1 Pinning
P$
&855(176285&(
5(9(56(&855(17
3527(&7,21
29(5&855(17
3527(&7,21
89/229/2
3527
,/,0
9,17
ƒ&
3527
&21752/
9'(7
(1
)$8/7
DDD
EDOO$
LQGH[DUHD
1;3
 
$
%
&
1;3
 
$ 9,17 9'(7 9%86
% 9,17 )$8/7 9%86
& (1 *1' ,'
'
DDD
7UDQVSDUHQWWRSYLHZ
Fig 3. Pin configuration WLCSP12 package
7.2 Pin description
Table 3.
Symbol
VINT
VBUS
EN
ILIM
Pin description
Pin
A1, B1
A3, B3
C1
D1
' ,/,0 '
'
DDD
7UDQVSDUHQWWRSYLHZ
Fig 4. Ball mapping for WLCSP12
Description
internal circuitry voltage I
external connector voltage O
enable input (active HIGH) I
current limiter I/O
NX5P1100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 21 March 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
3 of 20



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