Document
S-1003 Series
www.sii-ic.com © Seiko Instruments Inc., 2013
MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR
Rev.1.0_00
The S-1003 Series is a high-accuracy voltage detector developed using CMOS technology. The detection voltage is fixed internally with an accuracy of ±1.0% (−VDET ≥ 2.2 V). It operates with current consumption of 500 nA typ. The release signal can be delayed by setting a capacitor externally. Delay time accuracy is ±15%. Moreover, since the S-1003 Series includes the manual reset function, the reset signal can be also output forcibly. Two output forms Nch open-drain output and CMOS output are available.
Features
• Detection voltage: • Detection voltage accuracy:
• Current consumption: • Operation voltage range: • Hysteresis width: • Manual reset function: • Delay time accuracy: • Output form:
• Operation temperature range: • Lead-free (Sn 100%), halogen-free
1.2 V to 5.0 V (0.1 V step) ±1.0% (2.2 V ≤ −VDET ≤ 5.0 V) ±22 mV (1.2 V ≤ −VDET < 2.2 V) 500 nA typ. 0.95 V to 10.0 V 5% ± 2% MR pin logic active "L", active "H" ±15% (CD = 4.7 nF) Nch open-drain output (Active "L") CMOS output (Active "L") Ta = −40°C to +85°C
Applications
• Power supply monitor for microcomputer and reset for CPU • Constant voltage power supply monitor for TV, Blu-ray recorder and home appliance • Power supply monitor for portable devices such as notebook PC, digital still camera and mobile phone
Packages
• SOT-23-5 • SNT-6A
Seiko Instruments Inc.
1
MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR
S-1003 Series
Rev.1.0_00
Block Diagrams
1. Nch open-drain output product (S-1003NAxxI)
VDD
*1
VREF
+ −
VSS
*1
Delay circuit
MR *1 circuit
*1
OUT
*1
Function
Status
Output logic Active "L"
MR pin logic Active "L"
MR CD
*1. Parasitic diode
Figure 1
2. Nch open-drain output product (S-1003NBxxI)
VDD
*1
VREF
+ −
VSS
*1
Delay circuit
MR circuit
*1
*1
OUT
*1
Function
Status
Output logic Active "L"
MR pin logic Active "H"
MR CD
*1. Parasitic diode
Figure 2
2 Seiko Instruments Inc.
MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR
Rev.1.0_00
S-1003 Series
3. CMOS output product (S-1003CAxxI)
VDD
*1
VREF
+ −
VSS
*1. Parasitic diode
*1
Delay circuit
MR circuit
*1
*1
MR CD Figure 3
Function
Status
Output logic Active "L" *1 MR pin logic Active "L"
OUT
*1
4. CMOS output product (S-1003CBxxI)
VDD
*1
VREF
+ −
VSS
*1. Parasitic diode
*1
Delay circuit
MR circuit
*1
*1
MR CD Figure 4
Function
Status
Output logic Active "L" *1 MR pin logic Active "H"
OUT
*1
Seiko Instruments Inc.
3
MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR
S-1003 Series
Rev.1.0_00
Product Name Structure
Users can select the output form, MR pin logic, detection voltage value, and package type for the S-1003 Series. Refer to "1. Prod.