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IRS21952SPBF Dataheets PDF



Part Number IRS21952SPBF
Manufacturers International Rectifier
Logo International Rectifier
Description HIGH SIDE & DUAL LOW SIDE DRIVER IC
Datasheet IRS21952SPBF DatasheetIRS21952SPBF Datasheet (PDF)

Features • 2 low side output channels sharing common ground • 1 high side output channel • CMOS Schmitt trigger inputs with pull down resistor • Under voltage lockout on all channels • 5 V compatible logic level Inputs • Immune to –Vs spike and tolerant to dVs/dt & dVss/dt • Shoot through prevention logic Descriptions The IRS21952 contains 2 low side outputs sharing common ground and 1 high side output. Low side drivers can tolerate up to -600 V below input signal (VSS: input supply return). Hig.

  IRS21952SPBF   IRS21952SPBF


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Features • 2 low side output channels sharing common ground • 1 high side output channel • CMOS Schmitt trigger inputs with pull down resistor • Under voltage lockout on all channels • 5 V compatible logic level Inputs • Immune to –Vs spike and tolerant to dVs/dt & dVss/dt • Shoot through prevention logic Descriptions The IRS21952 contains 2 low side outputs sharing common ground and 1 high side output. Low side drivers can tolerate up to -600 V below input signal (VSS: input supply return). High side driver can tolerate up to 600 V above low side ground (COM: low side supply return). The IRS21952 has better propagation delay and thermal characteristics compared to a photo-coupler driver. The logic inputs are compatible with standard CMOS or LSTTL output. Proprietary HVIC and latch-up immune CMOS technologies enable ruggedized monolithic construction. IRS21952SPBF HIGH SIDE & DUAL LOW SIDE DRIVER IC Product Summary VOFFSET (low side) VOFFSET (high side) VOUT ton/toff (typ) Io+/- -600 V (VSS) 600 V (COM) 10 V to 20 V 330 ns/330 ns 0.5 A/0.5 A Package Typical Connection Diagram 16-Lead SOIC (narrow body) IRS21952SPBF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. parameters are absolute voltages referenced to COM. Symbol Definition Min Max All voltage Units HIN LIN1 LIN2 Floating logic level input voltage VSS-0.3 VDD+0.3 VDD Floating logic input supply voltage -0.3 625 VSS Floating logic input supply return voltage VDD-25 VDD+0.3 VB High side floating well supply voltage -0.3 625 VS High side floating well supply return voltage VB-25 VB+0.3 HO High side floating gate drive output voltage VS-0.3 VB+0.3 V VCC Low side supply voltage -0.3 25 LO1 LO2 Low side output voltage -0.3 VCC+0.3 dVS/dt Allowable VS offset transient relative to earth ground - 50 V/ns dVSS/dt Allowable VSS offset transient relative to earth ground - 50 V/ns PD Package power dissipation @ TA<=+25 ºC - 1W RθJA Thermal resistance, junction to ambient - 100 ºC/W TJ Junction temperature TS Storage temperature TL Lead temperature (soldering, 10 seconds) -55 150 ºC -55 150 ºC - 300 ºC Recommended Operating Conditions For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to COM. Symbol Definition Min Max Units HIN LIN1 LIN2 Floating logic level input voltage VSS VDD VDD Floating logic input supply voltage VSS+4.5 VSS+5.5 VSS Floating logic input supply return voltage -5 600 VB High side floating well supply voltage VS+10 VS+20 V VS High side floating well supply return voltage -5 600 HO High side floating gate drive output voltage VS VB VCC Low side supply voltage 10 20 LO1 LO2 Low side output voltage 0 VCC TA Ambient temperature -40 125 ºC Note 1: Logic operation for VS of –5 V to 600 V. Logic state held for VS of –5 V to –VBS. (Please refer to Design Tip DT97-3 for more details). 2 IRS21952SPBF Static Electrical Characteristics (VB-VS)=15 V. The VIN, VIN,TH, VBSUV, VO, IO and IIN parameters are referenced to VS. TA = 25 oC unless otherwise specified. Symbol Definition Min Typ Max Units Test Conditions VCCUV+ VCC supply undervoltage positive going threshold 7.5 8.6 9.7 VCCUV- VCC supply undervoltage negative going threshold VBSUV+ VBSUVVDDUV+ VDDUVILKVCC ILKVBS IQBS IQDD IQCC VIH VIL VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold VDD supply undervoltage positive going threshold VDD supply undervoltage negative going threshold Offset supply leakage current – both input well and output well Quiescent VBS supply current Quiescent VDD supply current Quiescent VCC supply current Logic “1” input voltage Logic “0” input voltage VOH High level output voltage, VBIAS-VO 7.0 7.5 7.0 3.3 2.9 --- ------3.5 --- --- 8.2 9.4 8.6 9.7 8.2 9.4 4.1 4.9 3.7 4.5 --- 50 70 140 140 280 200 400 --- ----- 0.6 --- 0.1 V µA V VB = VS = 600 V VCC = VCOM = 600 V VIN = 0 V or 5 V Io= 0 A VOL Low level output voltage, VO --- --- 0.1 Io= 0 A IIN+ Logic “1” input bias current IIN- Logic “0” input bias current Io+ Output high short circuit pulsed current Io- Output low short circuit pulsed current --- 2 10 µA --- --- 5 --- 0.5 ----- 0.5 --- A VIN = 5 V VIN = 0 V VO=0 V,VIN=0 V, PW<=10 µs VO=15 V,VIN=5 V, PW<=10 µs 3 IRS21952SPBF Dynamic Electrical Characteristics (All values are target data) (VB-VS)= 15 V. CL = 1000 pF unless otherwise specified. All parameters are reference to COM. TA = 25 oC unless otherwise specified. Symbol Definition Min Typ Max Units Test Conditions ton Turn-on propagation delay of high and low side --- 330 --- VSS=200 V, VS=0 V toff Turn-off propagation delay of high and low side --- 330 --- VSS=200 V, VS=400 V tr Turn-on rise time of high and low side tf Turn-off fall time of high and low side --- 25 70 VSS=200 V, VS=0 V ns --- 2.


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