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LTC2142-12 Dataheets PDF



Part Number LTC2142-12
Manufacturers Linear Technology
Logo Linear Technology
Description Low Power Dual ADCs
Datasheet LTC2142-12 DatasheetLTC2142-12 Datasheet (PDF)

FEATURES n 2-Channel Simultaneously Sampling ADC n 70.8dB SNR n 89dB SFDR n Low Power: 92mW/65mW/48mW Total 46mW/33mW/24mW per Channel n Single 1.8V Supply n CMOS, DDR CMOS, or DDR LVDS Outputs n Selectable Input Ranges: 1VP-P to 2VP-P n 750MHz Full Power Bandwidth S/H n Optional Data Output Randomizer n Optional Clock Duty Cycle Stabilizer n Shutdown and Nap Modes n Serial SPI Port for Configuration n 64-Pin (9mm × 9mm) QFN Package APPLICATIONS n Communications n Cellular Base Stations n Softwa.

  LTC2142-12   LTC2142-12



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FEATURES n 2-Channel Simultaneously Sampling ADC n 70.8dB SNR n 89dB SFDR n Low Power: 92mW/65mW/48mW Total 46mW/33mW/24mW per Channel n Single 1.8V Supply n CMOS, DDR CMOS, or DDR LVDS Outputs n Selectable Input Ranges: 1VP-P to 2VP-P n 750MHz Full Power Bandwidth S/H n Optional Data Output Randomizer n Optional Clock Duty Cycle Stabilizer n Shutdown and Nap Modes n Serial SPI Port for Configuration n 64-Pin (9mm × 9mm) QFN Package APPLICATIONS n Communications n Cellular Base Stations n Software Defined Radios n Portable Medical Imaging n Multi-Channel Data Acquisition n Nondestructive Testing LTC2142-12/ LTC2141-12/LTC2140-12 12-Bit, 65Msps/ 40Msps/25Msps Low Power Dual ADCs DESCRIPTION The LTC®2142-12/LTC2141-12/LTC2140-12 are 2-channel simultaneous sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70.8dB SNR and 89dB spurious free dynamic range (SFDR). Ultralow jitter of 0.08psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±0.3LSB INL (typ), ±0.1LSB DNL (typ) and no missing codes over temperature. The transition noise is 0.3LSBRMS. The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 1.8V VDD CH 1 ANALOG S/H INPUT 12-BIT ADC CORE CH 2 ANALOG INPUT 65MHz CLOCK S/H 12-BIT ADC CORE CLOCK CONTROL GND 1.8V OVDD OUTPUT DRIVERS D1_11 t t t D1_0 D2_11 t t t D2_0 CMOS, DDR CMOS OR DDR LVDS OUTPUTS OGND 21421012 TA01a AMPLITUDE (dBFS) 2-Tone FFT, fIN = 70MHz and 69MHz 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 0 10 20 FREQUENCY (MHz) 30 21821012 TA01b 21421012fa 1 LTC2142-12/ LTC2141-12/LTC2140-12 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Supply Voltages (VDD, OVDD)....................... –0.3V to 2V Analog Input Voltage (AIN+, AIN–, PAR/SER, SENSE) (Note 3).......... –0.3V to (VDD + 0.2V) Digital Input Voltage (ENC+, ENC–, CS, SDI, SCK) (Note 4).................................... –0.3V to 3.9V SDO (Note 4)............................................. –0.3V to 3.9V Digital Output Voltage ................ –0.3V to (OVDD + 0.3V) Operating Temperature Range LTC2142C, LTC2141C, LTC2140C............. 0°C to 70°C LTC2142I, LTC2141I, LTC2140I ............ –40°C to 85°C Storage Temperature Range .................. –65°C to 150°C PIN CONFIGURATIONS FULL RATE CMOS OUTPUT MODE T.



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