ISM67

3.2 mm x 2.5 mm Ceramic Package SMD Oscillator, LVMOS / LVPECL / LVDS Product Features Small Surface Mount Package Fast Sample Delivery Fast Sample Delivery Pb Free/ RoHS Compliant Leadfree Processing Applications xDSL Broadcast Video Wireless Base Stations Sonet /SDH WiMAX/WLAN Server and Storage Ethernet/LAN/WAN Optical modules Clock and data recovery FPGA/ASIC Backplanes GPON Frequency LVCMOS LVPECL LVDS Output Level LVCMOS LVPECL LVDS Duty Cycle LVMOS LVPECL LVDS Rise / Fall Time LVCMOS LVPECL LVDS Output Load LVCMOS LVPECL LVDS Frequency Stability Supply Voltage (Vcc) Aging Current Phase Jitter (RMS) (12kHz to 20MHz) Operating Temp. Range Storage Temp. Range 10.000MHz to 250.000MHz 10.000MHz to 1500.000MHz 10.000MHz to 1500.000MHz Logic “0” = 10% of Vcc max, Logic “1” = 90% of Vcc min Logic “0”= Vcc-1.62V max., Logic “1” = 1.02 V min VOD=(Diff. Output) 350mV Typ. 50% ±5% @ 50% of Vcc 50% ±5% @ 50%* 50% ±5% @ 50%* 2.0 ns max. (10% to 90%)* 0.8 ns max. (20% to 80%)* 0.8 ns max. (20% to 80%)* 15pF 50  to Vcc - 2.0 VDC RL=100 /CL= 5pF See Table Below +3.30 VDC ± 5%, +2.50 VDC ± 5% ±3.0 ppm max per year HCMOS = 45 mA max LVPECL = 90 mA max LVDS = 35 mA max 0.9 ps typical See Table Below -40 C to +85 C ISM67 Series 3.20±0.10 Marking 2.50±0.10 1.00±0.15 .60 TYP 123 654 1.30 TYP 1.60 2.30 .70 1.80 .90 .90 .80 Suggested Land Pattern PIN CONNECTIONS PIN 1 Enable/Disable or N/C PIN 2 Enable/Disable or N/C PIN 3 PIN 4 Ground Output PIN 5 Comp. Output o...