P4C1281

FEATURES Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) – 12/15/20/25 ns (Commercial) – 15/20/25/35 ns (Industrial) – 20/25/35/45 ns (Military) Low Power Operation 5V ± 10% Power Supply P4C1281/P4C1282 ULTRA HIGH SPEED 64K X 4 cmos STATIC RAMS Separate Inputs and Outputs – P4C1281 Input Data at Outputs during Write – P4C1282 Outputs in High Z during Write Fully TTL Compatible Inputs and Outputs Standard Pinout (JEDEC Approved) – 28-Pin 300 mil DIP, SOJ – 28-Pin 350 x 550 mil LCC DESCRIPTION The P4C1281 and P4C1282 are 262,144-bit (64Kx4) ultra high-speed static RAMs similar to the P4C1258, but with separate data I/O pins. The P4C1281 features a transparent write operation; the outputs of the P4C1282 are in high impedance during the write cycle. The RAMs operate from a single 5V ± 10% tolerance power supply. Access times as fast as 12 nanoseconds are available, permitting greatly enhanced system operating speeds. CMOS is used to reduce power consumption. The P4C1281 and P4C1282 are available in 28-pin 300 mil DIP and SOJ, and a 28-pin 350x550 mil LCC providing excellent board level densities. Functional Block Diagram Pin ConfigurationS Document # SRAM136 REV OR DIP (P5, C5, D5-2), SOJ (J5) LCC (L5) Revised July 2009 P4C1281/P4C1282 - ULTRA HIGH SPEED 64K x 4 CMOS STATIC RAMS Maximum Ratings(1) Sym Parameter VCC Power Supply Pin with Respect to GND Terminal Voltage with VTERM Respect to GND (up to 7.0V) TA Operating Temper...