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SMUN5211DW

SeCoS

NPN Multi-Chip Built-in Resistors Transistor

Elektronische Bauelemente SMUN52XXDW NPN Multi-Chip Built-in Resistors Transistor The BRT (Bias Resistor Transistor) c...


SeCoS

SMUN5211DW

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Description
Elektronische Bauelemente SMUN52XXDW NPN Multi-Chip Built-in Resistors Transistor The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the SMUN5211DW series, two BRT devices are housed in the SOT–363 package which is ideal for low power surface mount applications where board space is at a premium. Simplifies Circuit Design Reduces Board Space Reduces Component Count Pb-Free Package is available 6 54 Q2 R1 R2 R2 R1 Q1 12 3 MARKING DIAGRAM 6 54 7X 1 23 7X = Device Marking .055(1.40) .047(1.20) SOT-363 .026TYP (0.65TYP) .021REF (0.525)REF 8o 0o .096(2.45) .085(2.15) .053(1.35) .045(1.15) .014(0.35) .006(0.15) .087(2.20) .079(2.00) .043(1.10) .035(0.90) .018(0.46) .010(0.26) .006(0.15) .003(0.08) .004(0.10) .000(0.00) .039(1.00) .035(0.90) Dimensions in inches and (millimeters) MAXIMUM RATINGS (T A = 25°C unless otherwise noted, common for Q 1 and Q 2 ) Rating Collector-Base Voltage Collector-Emitter Voltage Collector Current Symbol V CBO V CEO IC Value 50 50 100 Unit Vdc Vdc mAdc THERMAL CHARACTERISTICS Characteristic (One Junction Heated) Total Device Dissipation T A = 25°C Derate above 25°C Thermal Resistance – Junction-to-Ambien...




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