Document
AOD7S60/AOU7S60
600V 7A α MOS TM Power Transistor
General Description
Product Summary
The AOD7S60 & AOU7S60 have been fabricated using the advanced αMOSTM high voltage process that is designed to deliver high levels of performance and robustness in switching applications. By providing low RDS(on), Qg and EOSS along with guaranteed avalanche capability these parts can be adopted quickly into new and existing offline power supply designs.
VDS @ Tj,max IDM RDS(ON),max Qg,typ Eoss @ 400V
100% UIS Tested 100% Rg Tested
700V 33A 0.6Ω 8.2nC 1.9µJ
TO252
DPAK
Top View
Bottom View
D D
TO251
Top View
Bottom View
S G AOD7S60
G S
S D G AOU7S60
S DG
G
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
Continuous Drain
TC=25°C
Current
TC=100°C
Pulsed Drain Current C
Avalanche Current C
Repetitive avalanche energy C
Single pulsed avalanche energy H
ID
IDM IAR EAR EAS
TC=25°C Power Dissipation B Derate above 25oC
PD
MOSFET dv/dt ruggedness Peak diode recovery dv/dt
dv/dt
Junction and Storage Temperature Range
TJ, TSTG
Maximum lead temperature for soldering purpose, 1/8" from case for 5 seconds K
Thermal Characteristics
TL
Parameter Maximum Junction-to-Ambient A,D Maximum Case-to-sink A Maximum Junction-to-CaseD,F
Symbol RθJA RθCS RθJC
Maximum 600 ±30 7 5
33 1.7 43 86 83 0.7 100 20 -55 to 150
300
Typical 45 -1.2
Maximum 55 0.5 1.5
D
S
Units V V
A
A mJ mJ W W/ oC V/ns °C
°C Units °C/W °C/W °C/W
Rev0: Aug 2011
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AOD7S60/AOU7S60
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
STATIC PARAMETERS
BVDSS Drain-Source Breakdown Voltage
ID=250µA, VGS=0V, TJ=25°C ID=250µA, VGS=0V, TJ=150°C
IDSS Zero Gate Voltage Drain Current
VDS=600V, VGS=0V VDS=480V, TJ=150°C
IGSS Gate-Body leakage current
VDS=0V, VGS=±30V
VGS(th) Gate Threshold Voltage
VDS=5V,ID=250µA
RDS(ON) Static Drain-Source On-Resistance
VGS=10V, ID=3.5A, TJ=25°C VGS=10V, ID=3.5A, TJ=150°C
VSD Diode Forward Voltage
IS=3.5A,VGS=0V, TJ=25°C
IS Maximum Body-Diode Continuous Current ISM Maximum Body-Diode Pulsed CurrentC
DYNAMIC PARAMETERS
Ciss Input Capacitance Coss Output Capacitance
VGS=0V, VDS=100V, f=1MHz
Co(er) Co(tr)
Effective output capacitance, energy related I
Effective output capacitance, time related J
VGS=0V, VDS=0 to 480V, f=1MHz
Crss Reverse Transfer Capacitance Rg Gate resistance
VGS=0V, VDS=100V, f=1MHz VGS=0V, VDS=0V, f=1MHz
SWITCHING PARAMETERS
Qg Qgs Qgd tD(on) tr tD(off) tf trr Irm Qrr
Total Gate Charge
Gate Source Charge
VGS=10V, VDS=480V, ID=3.5A
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time Turn-Off DelayTime
VGS=10V, VDS=400V, ID=3.5A, RG=25Ω
Turn-Off Fall Time
Body Diode Reverse Recovery Time IF=3.5A,dI/dt=100A/µs,VDS=400V
Peak Reverse Recovery Current
IF=3.5A,dI/dt=100A/µs,VDS=400V
Body Diode Reverse Recovery Charge IF=3.5A,dI/dt=100A/µs,VDS=400V
Min Typ Max Units
600 -
-
650 700
-
V
- -1 µA
- 10 -
- - ±100 nΑ
2.7 3.3 3.9
V
- 0.54 0.6 Ω
- 1.48 1.64 Ω
- 0.82 -
V
- - 7A
- - 33 A
- 372 - 28 -
- 22 -
pF pF
pF
- 65 -
- 1.2 - 17.5 -
pF
pF Ω
- 8.2 - nC
- 2.0 - nC
- 2.8 - nC
- 19 - ns
- 13 - ns
- 50 - ns
- 15 - ns
- 198 - 18 -
ns A
- 2.4 - µC
A. The value of R θJA is measured with the device in a still air environment with T A =25°C. B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C, Ratings are based on low frequency and duty cycles to keep initial TJ =25°C. D. The R θJA is the sum of the thermal impedance from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g. G. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. H. L=60mH, IAS=1.7A, VDD=150V, Starting TJ=25°C I. Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% V(BR)DSS. J. Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% V(BR)DSS. K. Wave soldering only allowed at leads.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WI.