Document
EN25QH16
EN25QH16 16 Megabit Serial Flash Memory with 4Kbyte Uniform Sector
FEATURES
• Single power supply operation - Full voltage range: 2.7-3.6 volt
• Serial Interface Architecture - SPI Compatible: Mode 0 and Mode 3
• 16 M-bit Serial Flash - 16 M-bit/2,048 K-byte/8,192 pages - 256 bytes per programmable page
• Standard, Dual or Quad SPI - Standard SPI: CLK, CS#, DI, DO, WP#, HOLD# - Dual SPI: CLK, CS#, DQ0, DQ1, WP#, HOLD# - Quad SPI: CLK, CS#, DQ0, DQ1, DQ2, DQ3
• High performance - 104MHz clock rate for Standard SPI - 80MHz clock rate for two data bits - 80MHz clock rate for four data bits
• Low power consumption - 12 mA typical active current - 1 μA typical power down current
• Uniform Sector Architecture: - 512 sectors of 4-Kbyte - 32 blocks of 64-Kbyte - Any sector or block can be erased individually
• Software and Hardware Write Protection: - Write Protect all or portion of memory via
software - Enable/Disable protection with WP# pin
• High performance program/erase speed - Page program time: 1.3ms typical - Sector erase time: 60ms typical - Block erase time 400ms typical - Chip erase time: 12 seconds typical
• Lockable 512 byte OTP security sector
• Support Serial Flash Discoverable Parameters (SFDP) signature
• Read Unique ID Number
• Minimum 100K endurance cycle
• Package Options - 8 pins SOP 150mil body width - 8 pins SOP 200mil body width - 8 contact VDFN (5x6mm) - 8 pins PDIP - 24 balls TFBGA (6x8mm) - All Pb-free packages are RoHS compliant
• Industrial temperature Range
GENERAL DESCRIPTION
The EN25QH16 is a 16 Megabit (2,048 K-byte) Serial Flash memory, with enhanced write protection mechanisms. The EN25QH16 supports the standard Serial Peripheral Interface (SPI), and a high performance Dual/Quad output as well as Dual/Quad I/O using SPI pins: Serial Clock, Chip Select, Serial DQ0(DI), DQ1(DO), DQ2(WP#) and DQ3(HOLD#). SPI clock frequencies of up to 80MHz are supported allowing equivalent clock rates of 160MHz (80MHz x 2) for Dual Output and 320MHz (80MHz x 4) for Quad Output when using the Dual/Quad I/O Fast Read instructions. The memory can be programmed 1 to 256 bytes at a time, using the Page Program instruction.
The EN25QH16 is designed to allow either single Sector/Block at a time or full chip erase operation. The EN25QH16 can be configured to protect part of the memory as the software protected mode. The device can sustain a minimum of 100K program/erase cycles on each sector or block.
This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
1
©2004 Eon Silicon Solution, Inc.,
Rev. F, Issue Date: 2011/06/01
www.eonssi.com
Figure.1 CONNECTION DIAGRAMS
EN25QH16
CS#
DO (DQ1) WP# (DQ2)
VSS
1 2 3 4
8 VCC 7 HOLD# (DQ3) 6 CLK 5 DI (DQ0)
8 - LEAD SOP / PDIP
CS# DO (DQ1) WP# (DQ2)
VSS
1 2 3 4
8 VCC 7 HOLD# (DQ3) 6 CLK 5 DI (DQ0)
8 - LEAD VDFN
This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
2
©2004 Eon Silicon Solution, Inc.,
Rev. F, Issue Date: 2011/06/01
www.eonssi.com
Top View, Balls Facing Down
EN25QH16
24 - Ball TFBGA
This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
3
©2004 Eon Silicon Solution, Inc.,
Rev. F, Issue Date: 2011/06/01
www.eonssi.com
Figure 2. BLOCK DIAGRAM
EN25QH16
Note:
1. DQ0 and DQ1 are used for Dual and Quad instructions. 2. DQ0 ~ DQ3 are used for Quad instructions.
This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
4
©2004 Eon Silicon Solution, Inc.,
Rev. F, Issue Date: 2011/06/01
www.eonssi.com
Table 1. Pin Names
EN25QH16
Symbol CLK DI (DQ0) DO (DQ1) CS# WP# (DQ2) HOLD# (DQ3) Vcc Vss NC
Pin Name
Serial Clock Input Serial Data Input (Data Input Output 0) *1 Serial Data Output (Data Input Output 1) *1 Chip Select Write Protect (Data Input Output 2) *2 HOLD# pin (Data Input Output 3) *2
Supply Voltage (2.7-3.6V)
Ground
No Connect
Note: 1. DQ0 and DQ1 are used for Dual and Quad instructions. 2. DQ2 ~ DQ3 are used for Quad instructions.
SIGNAL DESCRIPTION
Serial Data Input, Output and IOs (DI, DO and DQ0, DQ1, DQ2, DQ3)
The EN25QH16 support standard SPI, Dual SPI and Quad SPI operation. Standard SPI instructions use the unidirectional DI (input) pin to serially write instructions, addresses or data to the device on the rising edge of the Serial Clock (CLK) input pin. Standard SPI also uses the unidirectional DO (output) to read data or status from the device on the falling edge CLK.
Dual and Quad SPI instruction use the bidirectional IO pins to serially write instruction, addresses or data to the device on the rising edge of CLK and read data or status from the device on the falling edge of CLK.
Serial Clock (CLK) The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. ("See SPI Mode")
Chip Select (CS#) The SPI Chip Select (CS#) pin enabl.