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COP87L88RB Dataheets PDF



Part Number COP87L88RB
Manufacturers National Semiconductor
Logo National Semiconductor
Description 8-Bit CMOS OTP Microcontrollers with 16k or 32k Memory/ CAN Interface/ 8-Bit A/D/ and USART
Datasheet COP87L88RB DatasheetCOP87L88RB Datasheet (PDF)

COP87L88EB/RB Family, 8-Bit CMOS OTP Microcontrollers with 16k or 32k Memory, CAN Interface, 8-Bit A/D, and USART September 1999 COP87L88EB/RB Family 8-Bit CMOS OTP Microcontrollers with 16k or 32k Memory, CAN Interface, 8-Bit A/D, and USART General Description The COP87L88EB/RB Family OTP (One Time programmable) microcontrollers are highly integrated COP8™ Feature core devices with 16k or 32k memory and advanced features including a CAN 2.0B (passive) interface, A/D and USART. These multi-chi.

  COP87L88RB   COP87L88RB



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COP87L88EB/RB Family, 8-Bit CMOS OTP Microcontrollers with 16k or 32k Memory, CAN Interface, 8-Bit A/D, and USART September 1999 COP87L88EB/RB Family 8-Bit CMOS OTP Microcontrollers with 16k or 32k Memory, CAN Interface, 8-Bit A/D, and USART General Description The COP87L88EB/RB Family OTP (One Time programmable) microcontrollers are highly integrated COP8™ Feature core devices with 16k or 32k memory and advanced features including a CAN 2.0B (passive) interface, A/D and USART. These multi-chip CMOS devices are suited for applications requiring a full featured controller with a CAN interface, low EMI, and versatile communications interfaces, and as pre-production devices for ROM designs. Pin and software compatible 8k ROM versions (COP888EB) are available as well as a range of COP8 software and hardware development tools. Device COP87L88EB COP87L89EB COP87L88RB COP87L89RB Memory (bytes) 16k OTP EPROM 16k OTP EPROM 32k OTP EPROM 32k OTP EPROM Features include an 8-bit memory mapped architecture, 10 MHz CKI (-XE = crystal oscillator) with 1µs instruction cycle, two multi-function 16-bit timer/counters, WATCHDOG and clock monitor, idle timer, CAN 2.0B (passive) interface, MICROWIRE/PLUS™ serial I/O, SPI master/slave interface, fully buffered USART, 8 bit A/D with 8 channels, two power saving HALT/IDLE modes, MIWU, software selectable I/O options, low EMI 4.5V to 5.5V operation, program code security, and 44/68 pin packages. Note: A companion device with CAN interface, less I/O and memory, A/D, and PWM timer is the COP87L84BC. Devices included in this datasheet are: I/O Pins 35 58 35 58 Packages 44 PLCC 68 PLCC 44 PLCC 68 PLCC Temperature -40 to +85˚C -40 to +85˚C -40 to +85˚C -40 to +85˚C RAM (bytes) 192 192 192 192 Key Features n CAN 2.0B (passive) bus interface, with Software Power save mode n 8-bit A/D Converter with 8 channels n Fully buffered USART n Multi-input wake up (MIWU) on both Port L and M n SPI Compatible Master/Slave Interface n 16 or 32 kbytes of on-board OTP EPROM with security feature Note: Mask ROMed device with equivalent on-chip features and program memory size of 8k is available. CPU/Instruction Set Features n 1 µs instruction cycle time n Fourteen multi-sourced vectored interrupts servicing — External interrupt — Idle Timer T0 — Timers (T1 and T2) (4 Interrupts) — MICROWIRE/PLUS and SPI — Multi-input Wake up — Software Trap — CAN interface (3 interrupts) — USART (2 Inputs) n Versatile easy to use instruction set n 8-bit stacker pointer (SP) (Stack in RAM) n Two 8-bit RegisterR Indirect Memory Pointers (B, X) n 192 bytes of on-board RAM Additional Peripheral Features n Idle timer (programmable) n Two 16-bit timer, with two 16-bit registers supporting — Processor independent PWM mode — External Event counter mode — Input capture mode n WATCHDOG™ and Clock Monitor n MICROWIRE/PLUS serial I/O Fully Static CMOS n Two power saving modes: HALT, IDLE n Single supply operation: 4.5V to 5.5V n Temperature range: −40˚C to +85˚C Development Support n Emulation device for COP888EB n Real time emulation and full program debug offered by MetaLink Development System I/O Features n Software selectable I/O options (TRI-STATE ® outputs, Push pull outputs, Weak pull up input, High impedance input) n Schmitt trigger inputs on Port G, L and M n Packages: 44 PLCC with 35 I/O pins; 68 PLCC with 58 I/O pins TRI-STATE ® is a registered trademark of National Semiconductor Corporation. COP8™, MICROWIRE/PLUS™, WATCHDOG™ and MICROWIRE™ are trademarks of National Semiconductor Corporation. iceMASTER ® is a registered trademark of MetaLink Corporation. © 2000 National Semiconductor Corporation DS100044 www.national.com Free Datasheet http://www.datasheet4u.com/ COP87L88RB/COP87L89RB Basic Functional Description n CAN I/F — CAN serial bus interface block as described in the CAN specification part 2.0B (Passive) — Interface rates up to 250k bit/s are supported utilizing standard message identifiers n Programmable double buffered USART n A/D — 8-bit, 8 channel, 1-LSB Resolution, with improved Source Impedance and improved channel to channel cross talk immunity n Multi-Input-Wake-Up (MIWU) — edge selectable wake-up and interrupt capability via input port and CAN interface (Port L, Port M and CAN I/F); supports Wake-Up capability on SPI, USART, and T2 n Port C — 8-bit bi-directional I/O port n Port D — 8-bit Output port with high current drive capability (10 mA) n Port F — 8-bit bidirectional I/O n Port G — 8-bit bidirectional I/O port, including alternate functions for: — MICROWIRE™ Input and Output — Timer 1 Input or Output (Depending on mode selected) — External Interrupt input — WATCHDOG Output n Port I — 8-bit input port combining either digital input, or up to eight A/D input channels n Port L — 8-bit bidirectional I/O port, including alternate functions for: — USART Transmit/Receive I/O — Multi-input-wake up (MIWU on all pins) n Port M — 8-bit I/O port, with the following alternate function — SPI Int.


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