RL78/I1D
RENESAS MCU
1. OUTLINE
1.1 Features
Ultra-low power consumption technology
VDD = 1.6 V to 3.6 V HALT mode STOP mode SNOOZE mode
RL78 CPU core
CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed
from high speed (0.04167 μs: @ 24 MHz operation with high-speed on-chip oscillator) to ultra-low speed (66...
