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• Two selectable differential input channels • On-chip active low noise PGA with selectable gain of 32, 64 and 128 • On-chip power supply regulator fo
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a SLEEP mode, which reduces the standby power to approximately 25 mW, thereby optimizing the power consumption for system needs.
The THS5651A is manuf
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gy. These 4 1/2-digit, dual-slope-integrating, analog-to-digital converters (ADCs) are designed to provide interfaces to both a microprocessor and a v
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Ultrawideband frequency range: 9 kHz to 40 GHz Attenuation range: 0.5 dB steps to 31.5 dB Low insertion loss with impedance match
2.0 dB up to 18 GHz
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