• 32 KB L1 Instruction Cache
• 32 KB L1 Data Cache
• Support L1 cache RAMs protection with parity/ECC Support of 64-bit Armv8-A architecture:
• 1 MB unified L2 cache
• Support L2 cache RAMs protection wit...
MIMX8MD7DVAJZAA PDF File
| Part Number | MIMX8MD7DVAJZAA |
| Manufacturer | NXP (https://www.nxp.com/) |
| Title | i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors |
| Description | NXP Semiconductors Data Sheet: Technical Data Document Number: IMX8MDQLQCEC Rev. 3, 04/2021 MIMX8MQ6DVAJZAA MIMX8MQ5DVAJZAA MIMX8MQ6DVAJZIB MIMX... |
| Features |
Feature
Quad symmetric Cortex-A53 processors: • 32 KB L1 Instruction Cache • 32 KB L1 Data Cache • Support L1 cache RAMs protection with parity/ECC Support of 64-bit Armv8-A architecture: • 1 MB unified L2 cache • Support L2 cache RAMs protection wit... |
| Published | Aug 15, 2018 |
| Datasheet |
MIMX8MD7DVAJZAA PDF File
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