TMS418169

TMS418160 : The TMS4xx160 series is a set of high-speed, 16 777 216-bit dynamic random-access memories (DRAMs) organized as 1 048 576 words of 16 OE RAS VCC VSS W Output Enable Row-Address Strobe 5-V or 3.3-V Supply‡ Ground Write Enable bits each. The TMS4xx160P series is a similar ‡ See Available Options Table. set of high-speed, low-power, self-refresh, 16 777 216-bit DRAMs organized as 1 048 576 words of 16 bits each. Both sets employ state-of-the-art enhanced performance implanted CMOS (EPIC™) technology for high performance, reliability, and low power at low cost. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas .

TMS418160A : The TMS418160A is a 16 777 216-bit dynamic random-access memory (DRAM) device organized as 1 048 576 words of 16 bits. It employs state-of-the-art technology for high performance, reliability, and low power at low cost. This device features maximum RAS access times of 50-, 60-, and 70 ns. All address and data-in lines are latched on chip to simplify system design. Data out is unlatched to allow greater system flexibility. The TMS418160A is offered in a 42-lead plastic surface-mount SOJ package (DZ suffix). This package is designed for operation from 0° to 70°C. TMS418160A 1048576 BY 16-BIT DYNAMIC RANDOM-ACCESS MEMORY SMKS891C – AUGUST 1996 – REVISED OCTOBER 1997 DZ PACKAGE ( TOP VIEW ) V.

TMS418160P : The TMS4xx160 series is a set of high-speed, 16 777 216-bit dynamic random-access memories (DRAMs) organized as 1 048 576 words of 16 OE RAS VCC VSS W Output Enable Row-Address Strobe 5-V or 3.3-V Supply‡ Ground Write Enable bits each. The TMS4xx160P series is a similar ‡ See Available Options Table. set of high-speed, low-power, self-refresh, 16 777 216-bit DRAMs organized as 1 048 576 words of 16 bits each. Both sets employ state-of-the-art enhanced performance implanted CMOS (EPIC™) technology for high performance, reliability, and low power at low cost. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas .

TMS418169A : PIN NOMENCLATURE The TMS418169A and TMS428169A are 16 777 216-bit dynamic random-access memory (DRAM) devices organized as 1 048 576 words of A[0:9] DQ[0:15] LCAS UCAS Address Inputs Data In / Data Out Lower Column-Address Strobe Upper Column-Address Strobe 16 bits each. They employ state-of-the-art NC No Internal Connection technology for high performance, reliability, and low power at low cost. The TMS418169A features maximum RAS access times of 50-, 60-, and 70 ns, and the OE RAS VCC VSS W Output Enable Row-Address Strobe 5-V or 3.3-V Supply Ground Write Enable TMS428169A features maximum RAS access times of 60- and 70 ns. All addresses and data-in lines are latched on-chip to s.