SN74HC241

SN74HC240 : These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. PART NUMBER SN74HC240DW SN74HC240DBR SN74HC240N SN74HC240NSR SN74HC240PW SN74HC240J SNJ54HC240FK SNJ54HC240W Device Information PACKAGE(1) BODY SIZE (NOM) SOIC (20) 12.8 mm × 7.50 mm SSOP (20) 7.2 mm × 5.30 mm PDIP (20) 25.40 mm × 6.35 mm .

SN74HC244 : The SNx4HC244 octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The SNx4HC244 devices are organized as two 4bit buffers and drivers with separate output-enable (OE) inputs. When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the highimpedance state. Device Information PART NUMBER PACKAGE (PINS)(1) BODY SIZE (NOM) CDIP (20) 6.92 mm × 24.38 mm SN54HC244 CFP (20) 6.92 mm × 13.72 mm LCCC (20) 8.89 mm × 8.89 mm SN74HC244DB SSOP (20) 5.30 mm × 7.25 mm SN74HC244DW SOIC (20.

SN74HC244-EP : ordering information This octal buffer and line driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The SN74HC244 is organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. ORDERING INFORMATION TA PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING SOP − DW −40°C to 125°C TSSOP − PW Tape and reel Tape and reel SN74HC244QDWREP SN74HC244QPWREP SHC244EP SHC244EP −55°C to 125°C SOP − DW Tape and reel S.

SN74HC244-Q1 : This octal buffer and line driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The SN74HC244 is organized as two 4-bit buffers/ drivers with separate output-enable (OE) inputs. When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. PART NUMBER Device Information PACKAGE(1) BODY SIZE (NOM) SN74HC244QDW-Q1 SOIC (20) 12.80 mm × 7.50 mm SN74HC244QPW-Q1 TSSOP (20) 6.50 mm × 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Functional .

SN74HC245 : These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable ( OE) input can be used to disable the device so that the buses are effectively isolated. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) DB (SSOP, 20) 7.20 mm × 5.30 mm DW (SOIC, 20) 12.80 mm × 7.50 mm SNx4HC245 N (PDIP, 20) 24.33 mm × 6.35 mm NS (SO, 20) 12.60 mm × 5.30 mm PW (TSSOP, 20) 6.50 mm × 4.40 mm (1) For.