SN75154

SN75150 : The SN75150 is a monolithic dual line driver designed to satisfy the requirements of the standard interface between data-terminal equipment and data-communication equipment as defined by TIA/EIA-232-F. A rate of 20 kbits/s can be transmitted with a full 2500-pF load. Other applications are in data-transmission systems using relatively short single lines, in level translators, and for driving MOS devices. The logic input is compatible with most TTL families. Operation is from 12-V and –12-V power supplies. The SN75150 is characterized for operation from 0°C to 70°C. logic symbol† logic diagram (positive logic) S1 EN 1A 2 2A 3 7 1Y 6 2Y † This symbol is in accordance with ANSI/IEEE Std .

SN751506 : The SN751506 and the SN751516 are monolithic integrated circuits designed to drive the scan lines of a dc plasma panel display. The SN751516 pin sequence is reversed from the SN751506 for ease in printed-circuit-board layout. Each device consists of a 32-bit shift register and 32 OR gates. Serial data is entered into the shift register on the high-to-low transition of the clock input. When STROBE is low, all Q outputs are in the off state. Outputs are open-drain JFET transistors with a breakdown voltage in excess of 180 V. The outputs have a 220-mA sink current capability in the on state. Only one Q output should be allowed to be in the on state at a time. SERIAL OUT from the shift register .

SN751508 : The SN751508 and SN751518 are monolithic integrated circuits designed to drive the data lines of a dc plasma panel display. The SN751518 pin sequence is reversed from the SN751508 for ease in printed-circuit-board layout. Each device consists of two 16-bit shift registers, 32 latches, 32 OR gates, and 32 pnp opencollector output AND gates. Typically, a 32-bit data string is split into two 16-bit data strings externally and then entered in parallel into the shift registers on the high-to-low transition of the clock signal. A high LATCH ENABLE transfers the data from the shift registers to the inputs of 32 OR gates through the latches. Data present in the latch during the high-to-low transitio.

SN75150P : The SN75150 is a monolithic dual line driver designed to satisfy the requirements of the standard interface between data-terminal equipment and data-communication equipment as defined by TIA/EIA-232-F. A rate of 20 kbits/s can be transmitted with a full 2500-pF load. Other applications are in data-transmission systems using relatively short single lines, in level translators, and for driving MOS devices. The logic input is compatible with most TTL families. Operation is from 12-V and –12-V power supplies. The SN75150 is characterized for operation from 0°C to 70°C. logic symbol† logic diagram (positive logic) S1 EN 1A 2 2A 3 7 1Y 6 2Y † This symbol is in accordance with ANSI/IEEE Std .

SN75151 : .

SN751516 : The SN751506 and the SN751516 are monolithic integrated circuits designed to drive the scan lines of a dc plasma panel display. The SN751516 pin sequence is reversed from the SN751506 for ease in printed-circuit-board layout. Each device consists of a 32-bit shift register and 32 OR gates. Serial data is entered into the shift register on the high-to-low transition of the clock input. When STROBE is low, all Q outputs are in the off state. Outputs are open-drain JFET transistors with a breakdown voltage in excess of 180 V. The outputs have a 220-mA sink current capability in the on state. Only one Q output should be allowed to be in the on state at a time. SERIAL OUT from the shift register .

SN751518 : The SN751508 and SN751518 are monolithic integrated circuits designed to drive the data lines of a dc plasma panel display. The SN751518 pin sequence is reversed from the SN751508 for ease in printed-circuit-board layout. Each device consists of two 16-bit shift registers, 32 latches, 32 OR gates, and 32 pnp opencollector output AND gates. Typically, a 32-bit data string is split into two 16-bit data strings externally and then entered in parallel into the shift registers on the high-to-low transition of the clock signal. A high LATCH ENABLE transfers the data from the shift registers to the inputs of 32 OR gates through the latches. Data present in the latch during the high-to-low transitio.

SN75153 : .

SN75154N : The SN75154 is a monolithic low-power Schottky line receiver designed to satisfy the requirements of the standard interface between data terminal equipment and data communication equipment as defined by ANSI Standard EIA/TIA-232-E. Other applications are for relatively short, single-line, point-to-point data transmission and for level translators. Operation is normally from a single 5-V supply; however, a built-in option allows operation from a 12-V supply without the use of additional components. The output is compatible with most TTL circuits when either supply voltage is used. In normal operation, the threshold-control terminals are connected to the VCC1 terminal, even if power is being s.

SN75155 : The SN75155 monolithic line driver and receiver is designed to satisfy the requirements of the standard interface between data terminal equipment and data communication equipment as defined by ANSI EIA/TIA-232-E. A response control input is provided for the receiver. A resistor or a resistor and a bias voltage can be connected between the response control input and ground to provide noise filtering. The driver used is similar to the SN75188. The receiver used is similar to the SN75189A. The SN75155 is characterized for operation from 0°C to 70°C. logic symbol† 2 DA 7 DY 5 RA 6 RTC RESP 3 RY † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12 logic dia.

SN75155P : The SN75155 monolithic line driver and receiver is designed to satisfy the requirements of the standard interface between data terminal equipment and data communication equipment as defined by ANSI EIA/TIA-232-E. A response control input is provided for the receiver. A resistor or a resistor and a bias voltage can be connected between the response control input and ground to provide noise filtering. The driver used is similar to the SN75188. The receiver used is similar to the SN75189A. The SN75155 is characterized for operation from 0°C to 70°C. logic symbol† 2 DA 7 DY 5 RA 6 RTC RESP 3 RY † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12 logic dia.

SN75157 : The SN75157 is a dual differential line receiver designed to meet Standards EIA/TIA-422-B and -423-B and ITU V.10 and V.11. It utilizes Schottky circuitry and has TTL-compatible outputs. The inputs are compatible with either a single-ended or a differential-line system. The device operates from a single 5-V power supply and is supplied in 8-pin dual-in-line and small-outline packages. The SN75157 is characterized for operation from 0°C to 70°C. logic symbol† logic diagram (positive logic) 1IN + 1 1IN – 7 2IN + 6 2IN – 5 2 1OUT 3 2OUT † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 1 1IN + 1IN – 7 6 2IN + 2IN – 5 2 1OUT 3 2OUT Please be aware tha.

SN75157P : The SN75157 is a dual differential line receiver designed to meet Standards EIA/TIA-422-B and -423-B and ITU V.10 and V.11. It utilizes Schottky circuitry and has TTL-compatible outputs. The inputs are compatible with either a single-ended or a differential-line system. The device operates from a single 5-V power supply and is supplied in 8-pin dual-in-line and small-outline packages. The SN75157 is characterized for operation from 0°C to 70°C. logic symbol† logic diagram (positive logic) 1IN + 1 1IN – 7 2IN + 6 2IN – 5 2 1OUT 3 2OUT † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 1 1IN + 1IN – 7 6 2IN + 2IN – 5 2 1OUT 3 2OUT Please be aware tha.

SN75158 : The SN75158 is a dual differential line driver designed to satisfy the requirements set by the ANSI EIA/TIA-422-B and ITU V.11 interface specifications. The outputs provide complementary signals with high-current capability for driving balanced lines, such as twisted pair, at normal line impedance without high power dissipation. The output stages are TTL totem-pole outputs providing a high-impedance state in the power-off condition. The SN75158 is characterized for operation from 0°C to 70°C. logic symbol‡ 3 1A 5 2A logic diagram (positive logic) 2 1Y 1 1Z 6 2Y 7 2Z 3 1A 5 2A 2 1Y 1 1Z 6 2Y 7 2Z ‡ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Plea.

SN75158P : The SN75158 is a dual differential line driver designed to satisfy the requirements set by the ANSI EIA/TIA-422-B and ITU V.11 interface specifications. The outputs provide complementary signals with high-current capability for driving balanced lines, such as twisted pair, at normal line impedance without high power dissipation. The output stages are TTL totem-pole outputs providing a high-impedance state in the power-off condition. The SN75158 is characterized for operation from 0°C to 70°C. logic symbol‡ 3 1A 5 2A logic diagram (positive logic) 2 1Y 1 1Z 6 2Y 7 2Z 3 1A 5 2A 2 1Y 1 1Z 6 2Y 7 2Z ‡ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Plea.

SN75159 : The SN75159 dual differential line driver with 3-state outputs is designed to provide all the features of the SN75158 line driver with the added feature of driver output controls. There is an individual control for each driver. When the output control is low, the associated outputs are in a high-impedance state and the outputs can neither drive nor load the bus. This permits many devices to be connected together on the same transmission line for party-line applications. The SN75159 is characterized for operation from 0°C to 70°C. logic symbol† logic diagram (positive logic) 1EN 6 1A 4 1B 5 2EN 9 2A 10 2B 11 & EN 3 1Y 2 1Z 12 2Y 13 2Z † This symbol is in accordance with ANSI/IEEE Std 9.