MC10E104

MC10E101 : MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 4ĆInput OR/NOR Gate The MC10E/100E101 is a quad 4-input OR/NOR gate. • 500ps Max. Propagation Delay • Extended 100E VEE Range of – 4.2V to – 5.46V • 75kΩ Input Pulldown Resistors Pinout: 28-Lead PLCC (Top View) D3a D3b D3c D3d VCCO Q3 Q3 25 24 23 22 21 20 19 D2d 26 18 Q2 D2c 27 17 Q2 D2b 28 16 VCC VEE 1 15 Q1 D2a 2 14 Q1 D1d 3 13 Q0 D1c 4 12 Q0 5 6 7 8 9 10 11 D1b D1a D0d D0c D0b D0a VCCO * All VCC and VCCO pins are tied together on the die. MC10E101 MC100E101 QUAD 4-INPUT OR/NOR GATE FN SUFFIX PLASTIC PACKAGE CASE 776-02 12/93 © Motorola, Inc. 1996 LOGIC DIAGRAM D0a D0b Q0 D0c Q0 D0d D1a D1b Q1 D1c Q1 D1d D2a D2b Q2 D2c Q2 D2d.

MC10E101 : The MC10E/100E101 is a quad 4-input OR/NOR gate. The 100 Series contains temperature compensation. Features • 500 ps Max. Propagation Delay • PECL Mode Operating Range: ♦ VCC = 4.2 V to 5.7 V with VEE = 0 V • NECL Mode Operating Range: ♦ VCC = 0 V with VEE = −4.2 V to −5.7 V • Internal Input 50 kW Pulldown Resistors • ESD Protection: ♦ Human Body Model; 2 kV ♦ Machine Model; 200 V • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test • Moisture Sensitivity: Level 3 (Pb-Free) • Flammability Rating: ♦ UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34 • Transistor Count = 115 devices • These Devices are Pb-Free, Halogen Free and are RoHS Compliant www.onsemi.com PLCC−28 FN SUFFIX CASE 776−02.

MC10E104 : MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quint 2ĆInput AND/NAND Gate The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be used. • 600ps Max. Propagation Delay • OR/NOR Function Outputs • Extended 100E VEE Range of – 4.2V to – 5.46V • 75kΩ Input Pulldown Resistors Pinout: 28-Lead PLCC (Top View) D3a D4b D4a NC VCCO F F 25 24 23 22 21 20 19 D3b 26 18 Q4 D2a 27 17 Q4 D2b 28 16 VCC VEE 1 15 Q3 D1a 2 14 Q3 D1b 3 13 Q2 D0a 4 12 Q2 5 6 7 8 9 10 11 D0b VCCO Q0 Q0 Q1 Q1 VCCO * All VCC and VCCO pins are tied together on the die. PIN NAM.

MC10E107 : MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quint 2ĆInput XOR/XNOR Gate The MC10E/100E107 is a quint 2-input XOR/XNOR gate. The function output F is the OR of all five XOR outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be used. • 600ps Max. Propagation Delay • OR/NOR Function Outputs • Extended 100E VEE Range of – 4.2V to – 5.46V • 75kΩ Input Pulldown Resistors Pinout: 28-Lead PLCC (Top View) D3a D4b D4a 25 24 23 D3b 26 NC VCCO F 22 21 20 F 19 18 Q4 D2a 27 17 Q4 D2b 28 16 VCC VEE 1 15 Q3 D1a 2 14 Q3 D1b 3 13 Q2 D0a 4 12 Q2 5 6 7 8 9 10 11 D0b VCCO Q0 Q0 Q1 Q1 VCCO * All VCC and VCCO pins are tied together on the die. PIN NAMES Pi.

MC10E107 : The MC10E/100E107 is a quint 2-input XOR/XNOR gate. The function output F is the OR of all five XOR outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be used. The 100 Series contains temperature compensation. Features http://onsemi.com • 600 ps Maximum Propagation Delay • OR/NOR Function Outputs • PECL Mode Operating Range: • NECL Mode Operating Range: • • • • VCC = 4.2 V to 5.7 V with VEE = 0 V PLCC−28 FN SUFFIX CASE 776 • • • VCC = 0 V with VEE = −4.2 V to −5.7 V Internal Input 50 kW Pulldown Resistors ESD Protection: Human Body Model; 2 kV, Machine Model; 200 V Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test Moisture Sensi.