| Part Number | MC92308 |
| Manufacturer | Motorola |
| Title | OFDM Demodulator |
| Description | FUNCTIONALITY Common clock input (36.57 MHz) Reset (synchronous) ADC data strobe Input for samples from ADC ADC clock synchronization loop (+) ADC... |
| Features |
Summary • • • • • • • • • • • • • • Usable for 8MHz/7MHz/6MHz channels by adjusting the clock rate Digital I/Q separation on-chip Supports QPSK, 16-QAM and 64-QAM Supports all guard interval lengths (1/32, 1/16, 1/8, 1/4) Accepts 8-bit TTL-compatible twos-complement data input Provides the required ... |
| File Size | 57.78KB |
| Datasheet |
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MC92300 : The Viterbi Decoder contains the Viterbi core logic, which operates the K=7 convolutional code and generates a lock indication after successful acquisition. The core works with the main clock BITCLK, which provides the output data VO (output of the Viterbi). This clock is generated by the integrated bit clock generator circuit and is adjusted according to the programmed depuncturing rate. The input to the chip are 3 bit soft decision data VC0/1 from the QPSK demodulator together with the associated demodulator clock VDCLK. Rate adjustment in accordance with the several depuncturing rates is achieved with the input FIFO. The data is read into the depuncturing logic with the internally generat.
MC92303 : SIGNAL RESET SDA SADR[6:0] SCL I,Q[5:0] CLK_VCO FORMAT I_soft[2:0], Q_soft[2:0] BPSK AGC VCO CLK FUNCTIONALITY Asynchronous Reset Data Bus of I2C-interface Slave Address of I2C-interface Clock Line of I2C-interface Inphase and Quadrature Symbol Inputs Input Clock from VCO Input Format Selection Soft Decision Output Signals Demodulated BPSK Signal AGC Control Signal Control Signal for External VCO Control Signal for Clock VCO Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of.
MC92305 : Table 2. MC92305 Pin Description SIGNAL RESETB I[9:0] & Q[9:0] ADCLKIN IN_FMT IQSWAP SYMFE BITCLK AGCOUT, VCOOUT, CTLOUT ADCLKOUT DMODLOCK MSSLOCK SCLK DOUT[7:0] DO_VAL FRAME_S.
MC92307 : MOTOROLA SEMICONDUCTOR TECHNICAL DATA Current information @www.mot.com.sps/ADC MC92307 Advance Information 2K - Samples FFT-Processor RESB CLK SYMSYNC The MC92307 is a pipelined Fast Fourier Transformation (FFT) processor with a blocklength of 2048 complex samples. It is especially designed for use in digital terrestrial Set-Top boxes according to the DVB-T standard for 2K transmission. One block of 2048 complex samples can be processed in 224 µs Feature Summary • • • • • • • • • • Processing of one block of 2048 complex samples (i.e. one 2K-OFDM symbol) in 224 µs. Designed for direct interfacing with Motorola’s OFDM demodulator MC92308. Input wordlength 8 bit, output accuracy selectabl.