Part Number | ST95P04 |
Manufacturer | ST Microelectronics |
Title | SERIAL ACCESS SPI BUS 4K 512 x 8 EEPROM |
Description | The ST95P04 is a 4K bit Electrically Erasable Programmable Memory (EEPROM) fabricated with SGS-THOMSON’s High Endurance Single Polysilicon CMOS te... |
Features |
interrupted with a hold input (HOLD). The write operation is disabled by a write protect input (W). Table 1. Signal Names
C D Q S W HOLD VCC VSS Serial Clock Serial Data Input Serial Data Output Chip Select Write Protect Hold Supply Voltage Ground
VCC
D C S W HOLD ST95P04
Q
VSS
AI01063B
June 1...
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File Size | 151.83KB |
Datasheet |
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ST95P02 : The ST95P02 is a 2K bit Electrically Erasable Programmable Memory (EEPROM) fabricated with SGS-THOMSON’s High Endurance Single Polysilicon CMOS technology. The 2K bit memory is organised as 16 pages of 16 bytes. The memory is accessed by a simple SPI bus compatible serial interface. The bus signals are a serial clock input (C), a serial data input (D) and a serial data output (Q). The device connected to the bus is selected when the chip select input (S) goes low. Communications with the chip can be interrupted with a hold input (HOLD). The write operation is disabled by a write protect input (W). Table 1. Signal Names C D Q S W HOLD VCC VSS Serial Clock Serial Data Input Serial Data Output .
ST95P08 : The ST95P08 is an 8 Kbit Electrically Erasable Programmable Memory (EEPROM) fabricated with STMicroelectronics’s High Endurance Single Polysilicon CMOS technology. The 8 Kbit memory is organised as 64 pages of 16 bytes. The memory is accessed by a simple SPI bus compatible serial interface. The bus signals are a serial clock input (C), a serial data input (D) and a serial data output (Q). The device connected to the bus is selected when the chip select input (S) goes low. Communications with the chip can be interrupted with a hold input (HOLD). The write operation is disabled by a write protect input (W). Figure 1. Logic Diagram VCC D C S ST95P08 Q Table 1. Signal Names C D Q S W HOLD V.