| Part Number | GS71116TJ |
| Manufacturer | GSI Technology |
| Title | (GS71116x) 64K x 16 1Mb Asynchronous SRAM |
| Description | The GS71116 is a high speed CMOS static RAM organized as 65,536-words by 16-bits. Static design eliminates the need for external clocks or timing ... |
| Features |
• Fast access time: 10, 12, 15ns • CMOS low power operation: 100/85/70 mA at min. cycle time. • Single 3.3V ± 0.3V power supply • All inputs and outputs are TTL compatible • Byte control • Fully static operation • Industrial Temperature Option: -40° to 85°C • Package line up J: 400mil, 44 pin SOJ pa... |
| File Size | 181.61KB |
| Datasheet |
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GS71116TP : The GS71116 is a high speed CMOS static RAM organized as 65,536-words by 16-bits. Static design eliminates the need for external clocks or timing strobes. Operating on a single 3.3V power supply and all inputs and outputs are TTL compatible. The GS71116 is available in a 6x8 mm Fine Pitch BGA package as well as in 400 mil SOJ and 400 mil TSOP Type-II packages. Pin Descriptions Symbol A0 to A15 DQ1 to DQ16 CE LB UB WE OE VDD VSS NC Description Data input/output Chip enable input w w w Lower byte enable input (DQ1 to DQ8) Upper byte enable input (DQ9 to DQ16) Write enable input Output enable input +3.3V power supply Ground No connect .D Address input t a S a e h t e A B C D E F G.
GS71116TU : The GS71116 is a high speed CMOS static RAM organized as 65,536-words by 16-bits. Static design eliminates the need for external clocks or timing strobes. Operating on a single 3.3V power supply and all inputs and outputs are TTL compatible. The GS71116 is available in a 6x8 mm Fine Pitch BGA package as well as in 400 mil SOJ and 400 mil TSOP Type-II packages. Pin Descriptions Symbol A0 to A15 DQ1 to DQ16 CE LB UB WE OE VDD VSS NC Description Data input/output Chip enable input w w w Lower byte enable input (DQ1 to DQ8) Upper byte enable input (DQ9 to DQ16) Write enable input Output enable input +3.3V power supply Ground No connect .D Address input t a S a e h t e A B C D E F G.