Part Number | MC74AC244 |
Manufacturer | ON Semiconductor |
Title | Octal Buffer/Line Driver |
Description | ... |
Features |
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File Size | 257.12KB |
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MC74AC240 : ( DataSheet : www.DataSheet4U.com ) MC74AC240 MC74ACT240 Octal Buffer/Line Driver with 3ĆState Outputs OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS The MC74AC240/74ACT240 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • Outputs Source/Sink 24 mA • ′ACT240 Has TTL Compatible Inputs VCC 20 OE2 19 18 17 16 15 14 13 12 11 N SUFFIX CASE 738-03 PLASTIC 1 OE1 2 3 4 5 6 7 8 9 10 GND DW SUFFIX CASE 751D-04 PLASTIC TRUTH TABLE Inputs OE1 L L H D L H X Outputs (Pins 12, 14, 16, 18).
MC74AC240 : MC74AC240, MC74ACT240 Octal Buffer/Line Driver with 3-State Outputs The MC74AC240/74ACT240 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. Features • 3−State Outputs Drive Bus Lines or Buffer Memory Address Registers • Outputs Source/Sink 24 mA • ′ACT240 Has TTL Compatible Inputs • These are Pb−Free Devices TRUTH TABLE Inputs Outputs OE1 D (Pins 12, 14, 16, 18) LL LH HX H L Z NOTE: H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance TRUTH TABLE Inputs Outputs OE2 D LL LH HX (Pins 3, 5, 7, 9) H L Z NOTE: H = HIGH Volt.
MC74AC241 : ( DataSheet : www.DataSheet4U.com ) MC74AC241 MC74ACT241 Octal Buffer/Line Driver with 3ĆState Outputs OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS The MC74AC241/74ACT241 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • Outputs Source/Sink 24 mA • ′ACT241 Has TTL Compatible Inputs VCC 20 OE2 19 18 17 16 15 14 13 12 11 N SUFFIX CASE 738-03 PLASTIC 1 OE1 2 3 4 5 6 7 8 9 10 GND DW SUFFIX CASE 751D-04 PLASTIC TRUTH TABLE Inputs OE1 L L H D L H X Outputs (Pins 12, 14, 16, 18).
MC74AC244 : ( DataSheet : www.DataSheet4U.com ) MC74AC244 MC74ACT244 Octal Buffer/Line Driver with 3ĆState Outputs OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS The MC74AC244/74ACT244 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter/ receiver which provides improved PC board density. • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • Outputs Source/Sink 24 mA • ′ACT244 Has TTL Compatible Inputs N SUFFIX CASE 738-03 PLASTIC VCC 20 OE2 19 18 17 16 15 14 13 12 11 1 OE1 2 3 4 5 6 7 8 9 10 GND DW SUFFIX CASE 751D-04 PLASTIC TRUTH TABLE Inputs OE1 L L H D L H X Outputs (Pins 12, 14, 16, 18) L .
MC74AC245 : ( DataSheet : www.DataSheet4U.com ) MC74AC245 MC74ACT245 Octal Bidirectional T ransceiver with 3ĆState Inputs/Outputs OCTAL BIDIRECTIONAL TRANSCEIVER WITH 3-STATE INPUTS/OUTPUTS The MC74AC245/74ACT245 contains eight non-inverting bidirectional buffers with 3-state outputs and is intended for bus-oriented applications. Current sinking capability is 24 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in .
MC74AC245 : MC74AC245, MC74ACT245 Octal Bidirectional Transceiver with 3-State Inputs/Outputs The MC74AC245/74ACT245 contains eight non−inverting bidirectional buffers with 3−state outputs and is intended for bus−oriented applications. Current sinking capability is 24 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active−HIGH) enables data from A ports to B ports; Receive (active−LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a High Z condition. Features • Noninverting Buffers • Bidirectional Data Path • A and B Outputs Sou.