MN101C61D

MN101C61 : MN101C61D, MN101C61G Type ROM (× 8-bit) RAM (× 8-bit) Package Minimum Instruction Execution Time Standard: MN101C61D (under development) 64 K 3K TQFP080-P-1212D *Lead-free MN101C61G 128 K 12 K 0.1 µ s (at 2.5 V to 3.6 V, 20 MHz) 0.2 µ s (at 2.1 V to 3.6 V, 10 MHz) 0.5 µ s (at 1.8 V to 3.6 V, 4 MHz)* 125 µ s (at 1.8 V to 3.6 V, 32 kHz)* Double speed: 0.1 µ s (at 2.5 V to 3.6 V, 10 MHz) 0.2 µ s (at 2.1 V to 3.6 V, 5 MHz) 0.5 µ s (at 1.8 V to 3.6 V, 2 MHz)* 62.5 µ s (at 1.8 V to 3.6 V, 32 kHz)* * The operation guarantee range for flash memory built-in type is 2.2V to 3.0 V or 2.7V to 3.6 V. • RESET • Watchdog • External 0 • External 1 • External 2 • External 3 • External 4 • External 5 • Time.

MN101C61G : Sheet4U.com AM1 (MN101) Series AM1 (MN101) Series The AM1 Series of 8-bit microcomputers is the realization of developments in C programming. Because of the 8-bit architecture, which allows half-byte instruction sets and offers other advantages, assembler ROM code size can be reduced. They are compact and consume little power, but feature a shortest instruction processing time of 63 ns (5 V). They can be used in a wide variety of applications where cost performance is a demand. Features q Efficiency of C-based ROM code: Assembler rate 1 or less q High-speed instruction processing: 63 ns (32 MHz) q Linear address space: 1 MB q Identical architecture for 32- and 16-bit microcomputers q Opti.