Part Number
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IS61QDPB251236A |
Manufacturer
|
ISSI |
Description
|
18Mb QUADP (Burst 2) Synchronous SRAM |
Published
|
Jun 10, 2016 |
Detailed Description
|
IS61QDPB21M18A/A1/A2 IS61QDPB251236A/A1/A2
1Mx18, 512Kx36 18Mb QUADP (Burst 2) Synchronous SRAM
(2.5 CYCLE READ LATENCY)...
|
Datasheet
|
IS61QDPB251236A
|
Overview
IS61QDPB21M18A/A1/A2 IS61QDPB251236A/A1/A2
1Mx18, 512Kx36 18Mb QUADP (Burst 2) Synchronous SRAM
(2.
5 CYCLE READ LATENCY)
OCTOBER 2014
FEATURES
512Kx36 and 1Mx18 configuration available.
On-chip Delay-Locked Loop (DLL) for wide data valid window.
Separate independent read and write ports with concurrent read and write operations.
Synchronous pipeline read with EARLY write operation.
Double Data Rate (DDR) interface for read and write input ports.
2.
5 Cycle read latency.
Fixed 2-bit burst for read and write operations.
Clock stop support.
Two input clocks (K and K#) for address and control registering at rising edges only.
Two echo clocks (CQ and CQ#) that are delivered s...
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