Part Number
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IS61NVP409618B |
Manufacturer
|
Integrated Silicon Solution |
Description
|
PIPELINE (NO WAIT) STATE BUS SRAM |
Published
|
Jul 25, 2016 |
Detailed Description
|
IS61NLP204836B/IS61NVP/NVVP204836B IS61NLP409618B/IS61NVP/NVVP409618B
2M x 36 and 4M x 18
JULY 2019
72Mb, PIPELINE '...
|
Datasheet
|
IS61NVP409618B
|
Overview
IS61NLP204836B/IS61NVP/NVVP204836B IS61NLP409618B/IS61NVP/NVVP409618B
2M x 36 and 4M x 18
JULY 2019
72Mb, PIPELINE 'NO WAIT' STATE BUS SRAM
FEATURES
• 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address,
data and control • Interleaved or linear burst sequence control us-
ing MODE input • Three chip enables for simple depth expansion
and address pipelining • Power Down mode • Common data inputs and data outputs • CKE pin to enable clock and suspend operation • JEDEC 100-pin TQFP, 165-ball PBGA and 119-
ball PBGA packages • Power s...
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