Part Number
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IS61DDB251236A |
Manufacturer
|
Integrated Silicon Solution |
Description
|
18Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM |
Published
|
Jul 25, 2016 |
Detailed Description
|
IS61DDB21M18A IS61DDB251236A
1Mx18, 512Kx36
18Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
OCTOBER 2014
FEATURES
512Kx36...
|
Datasheet
|
IS61DDB251236A
|
Overview
IS61DDB21M18A IS61DDB251236A
1Mx18, 512Kx36
18Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
OCTOBER 2014
FEATURES
512Kx36 and 1Mx18 configuration available.
On-chip delay-locked loop (DLL) for wide data valid
window.
Common I/O read and write ports.
Synchronous pipeline read with self-timed late write
operation.
Double Data Rate (DDR) interface for read and
write input ports.
Fixed 2-bit burst for read and write operations.
Clock stop support.
Two input clocks (K and K#) for address and control
registering at rising edges only.
Two input clocks (C and C#) for data output control.
Two echo clocks (CQ and CQ#) that are delivered
simultaneously with data.
+1.
8V core power sup...
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