Part Number
|
CY7C1910BV18 |
Manufacturer
|
Cypress Semiconductor |
Description
|
1.8V Synchronous Pipelined SRAM |
Published
|
Nov 6, 2016 |
Detailed Description
|
CY7C1310BV18, CY7C1910BV18 CY7C1312BV18, CY7C1314BV18
18-Mbit QDR™-II SRAM 2-Word Burst Architecture
Features
■ Separa...
|
Datasheet
|
CY7C1910BV18
|
Overview
CY7C1310BV18, CY7C1910BV18 CY7C1312BV18, CY7C1314BV18
18-Mbit QDR™-II SRAM 2-Word Burst Architecture
Features
■ Separate independent read and write data ports ❐ Supports concurrent transactions
■ 250 MHz clock for high bandwidth
■ 2-word burst on all accesses
■ Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 500 MHz) at 250 MHz
■ Two input clocks (K and K) for precise DDR timing ❐ SRAM uses rising edges only
■ Two input clocks for output data (C and C) to minimize clock skew and flight time mismatches
■ Echo clocks (CQ and CQ) simplify data capture in high-speed systems
■ Single multiplexed address input bus latches address inputs for both read and write...
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