1:2 Clock Fanout Buffer and Frequency Divider 8T73S1802 DATA SHEET General Description Features The 8T73S1802 is a fully integrated clock fanout buffer and frequency divider.
The input signal is frequency-divided and then fanned out to one differential LVPECL and one LVCMOS output.
Each of the outputs can select its individual divider value from the range of ÷1, ÷2, ÷4 and ÷8.
Three control inputs EN, SEL0 and SEL1 (3-level logic) are available to select the frequency dividers and the output enable/disable state.
The single-ended LVCMOS output is phase-delayed by 650ps to minimize coupling of LVCMOS switching into the differential output during its signal transition.
The 8T73S1802 is opti...

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