DatasheetsPDF.com

CY7C1564XV18

72-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture

Description

CY7C1562XV18/CY7C1564XV18 72-Mbit QDR® II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) 72-Mbit QDR® II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) Features ■ Separate independent read and write data ports ❐ Supports concurrent transactions ■ 450 MHz clock for high bandwidth ■ Two-word burst for reducing address bus...


Cypress Semiconductor

View CY7C1564XV18 Datasheet






Similar Datasheet



@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)