ispLSI® 1016EA In-System Programmable High Density PLD Features Functional Block Diagram USE is5pVMDAECSIHG4NAS5 FOR • HIGH-DENSITY PROGRAMMABLE LOGIC — 2000 PLD Gates — 32 I/O Pins, One Dedicated Input — 96 Registers — High-Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
— Small Logic Block Size for Random Logic — Functionally Compatible with ispLSI 1016E • NEW FEATURES — 100% IEEE 1149.
1 Boundary Scan Testable — ispJTAG™ In-System Programmable via IEEE 1149.
1 (JTAG) Test Access Port — User-Selectable 3.
3V or 5V I/O Supports Mixed- Voltage Systems (VCCIO Pin) — Open-Drain Output Option • HIGH-PERFORMANCE E2CMOS® TECHNOLOGY — fmax ...

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