Features • Third Generation Programmable Logic Structure – High-Density Replacement for Discrete Logic • High-Speed — Plus a New, Low-Power Version • Increased Logic Flexibility – 42 Inputs and 20 Sum Terms • Flexible Output Logic – 20 Flip-Flops - 10 Extra – All Can Be Individually Buried or 10 Output Directly – Each has Individual Asynchronous Reset and Clock Terms • Multiple Feedback Paths Provide for Buried State Machines and I/O Bus Compatibility • Proven and Reliable High-Speed CMOS EPROM Process – 2000V ESD Protection – 200 mA Latchup Immunity • Reprogrammable – Tested 100% for Programmability • 24-pin, 300-mil Dual-In-line and 28-Lead Surface Mount Packages Logic Diagram High Densit...

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