Core Logic ,19[ $0,+*  PLFURQ &026 *DWH $UUD\ Description INVx is a family of inverters which perform the logical NOT function.
Logic Symbol Truth Table INVx AQ AQ AQ LH HL ® HDL Syntax Verilog .
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INVx inst_name (Q, A); VHDL.
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inst_name: INVx port map (Q, A); Pin Loading Equivalent Loads Pin Name INV1 INV2 INV3 INV4 A 1.
0 2.
1 3.
2 4.
2 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) INV1 1.
0 TBD 0.
6 INV2 1.
0 TBD 0.
6 INV3 2.
0 TBD 1.
2 INV4 2.
0 TBD 1.
2 INV5 3.
0 TBD 1.
8 INV6 3.
0 TBD 1.
8 a.
See page 2-15 power equation INV5 5.
2 INV6 6.
3 3-126 ® Pro...

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