CMOS Gate Array
Core Logic ,19[ $0,+* PLFURQ &026 *DWH $UUD\ Description INVx is a family of inverters which perform the logical NOT function. Logic Symbol Truth Table INVx AQ AQ AQ LH HL ® HDL Syntax Verilog .................... INVx inst_name (Q, A); VHDL...................... inst_name: INVx port map (Q, A); Pin Loading Equivalent Loads Pin Name INV1 INV2 ...
AMI