| Part Number | M12L128168A-6TG |
| Manufacturer | ESMT |
| Title | 2M x 16 Bit x 4 Banks Synchronous DRAM |
| Description | The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits. Synchronous design a... |
| Features |
y JEDEC standard 3.3V power supply y LVTTL compatible with multiplexed address y Four banks operation y MRS cycle with address key programs
- CAS Latency ( 2 & 3 ) - Burst Length ( 1, 2, 4, 8 & full page ) - Burst Type ( Sequential & Interleave ) y All inputs are sampled at the positive going edge o...
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| File Size | 602.24KB |
| Datasheet |
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M12L128168A-6TG2N : The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits. Synchr.
M12L128168A-6TG2S : The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits. Synchronous design allow.
M12L128168A-6TVAG2S : The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable la.
M12L128168A-6TVG2S : The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable la.