Part Number
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M12L128168A-6TVAG2S |
Manufacturer
|
ESMT |
Description
|
2M x 16 Bit x 4 Banks Synchronous DRAM |
Published
|
Mar 25, 2019 |
Detailed Description
|
ESMT
SDRAM
FEATURES
JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operatio...
|
Datasheet
|
M12L128168A-6TVAG2S
|
Overview
ESMT
SDRAM
FEATURES
JEDEC standard 3.
3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs
- CAS Latency ( 2 & 3 ) - Burst Length ( 1, 2, 4, 8 & full page ) - Burst Type ( Sequential & Interleave ) All inputs are sampled at the positive going edge of the system clock Burst Read single write operation DQM for masking Auto & self refresh (self refresh is not supported for VA grade) Refresh - 64 ms refresh period (4K cycle) for V grade -16 ms refresh period (4K cycle) for VA grade
M12L128168A (2S)
Automotive Grade
2M x 16 Bit x 4 Banks
Synchronous DRAM
GENERAL DESCRIPTION
The M12L128168A is 134,217,728 bits synchron...
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