A-Data Synchronous DRAM ADS6608A4A 2M x 8 Bit x 4 Banks General Description The ADS6608A4A are four-bank Synchronous DRAMs organized as 2,097,152 words x 8 bits x 4 banks.
Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth high performance memory system applications Features •JEDEC standard LVTTL 3.
3V power supply •MRS Cycle with address key programs -CAS Latency (2 & 3) -Burst Length (1,2,4,8,& full page) -Burst Type (sequential & Interleave) •4 banks operation ...

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)