74LVC2G00

74LVC2G00 : Pin Assignments The 74LVC2G00 is a dual, two input NAND gate. Both gates have push-pull outputs designed for operation over a power supply range of 1.65V to 5.5V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing damaging current backflow when the device is powered down. Each gate performs the positive Boolean function: Y  A  B or Y  A  B (Top View) 1A 1 8 VCC 1B 2 7 1Y 2Y 3 6 2B GND 4 5 2A Features  Wide Supply Voltage Range from 1.65 to 5.5V  ± 24mA Output Drive at 3.3V  CMOS Low Power Consumption  IOFF Supports Partial-Power-Down Mode Operation  Inputs accept up to 5.5V  Schmitt Trigger Ac.

74LVC2G00 : The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits  Wide supply voltage range from 1.65 V to 5.5 V  5 V tolerant outputs for interfacing with 5 V logic  High noise immunity  24 mA output drive (VCC = 3.0 V)  CMOS low power consumption  Complies with JEDEC standard:  JESD8-7 (1.65 V to 1.95 V)  JESD8-5 (2.3.

74LVC2G00-Q100 : The 74LVC2G00-Q100 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits  Automotive product qualification in accordance with AEC-Q100 (Grade 1)  Specified from 40 C to +85 C a.

74LVC2G00-Q100 : The 74LVC2G00-Q100 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • Auto.

74LVC2G02 : The 74LVC2G02 is a dual 2-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 1.65 V to 5.5 V • 5 V tolerant outputs for interfacing with 5 V logic • Overvoltage tolerant inputs to 5.5 V • High noise immunity .

74LVC2G02 : Pin Assignments The 74LVC2G02 is a dual, two input NOR gate. Both gates have push-pull outputs designed for operation over a power supply range of 1.65V to 5.5V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing damaging current backflow when the device is powered down. Each gate performs the positive Boolean function: Y  A  B or Y  A  B (Top View) 1A 1 8 VCC 1B 2 7 1Y 2Y 3 6 2B GND 4 5 2A Features  Wide Supply Voltage Range from 1.65 to 5.5V  ± 24mA Output Drive at 3.3V  CMOS Low Power Consumption  IOFF Supports Partial-Power-Down Mode Operation  Inputs accept up to 5.5V  Schmitt Trigger Act.

74LVC2G02 : The UTC U74LVC2G02 is a dual 2-input positive-NOR gate which provides the function Y=A+B or Y=A+B . This device has power-down protective circuit, preventing device destruction when it is powered down. „ FEATURES * Operation Voltage Range: 1.65~5.5V * Low Power Dissipation: ICC=10μA(Max) * High Speed: tpd=4.9ns(VCC=3.3V) * Specified from -40 to +85°C „ ORDERING INFORMATION Ordering Number Lead Free Plating Halogen Free U74LVC2G02L-S08-R U74LVC2G02G-S08-R U74LVC2G02L-S08-T U74LVC2G02G-S08-T Package SOP-8 SOP-8 CMOS IC Packing Tape Reel Tube www.unisonic.com.tw Copyright © 2012 Unisonic Technologies Co., Ltd 1 of 5 QW-R502-790.A U74LVC2G02 „ PIN CONFIGURATION 1A 1 1B 2 2Y 3 GN.

74LVC2G02 : The 74LVC2G02 is a dual 2-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 1.65 V to 5.5 V • 5 V tolerant outputs for interfacing with 5 V logic • Overvoltage tolerant inputs to 5.5 V • High noise immunity .

74LVC2G02-Q100 : The 74LVC2G02-Q100 is a dual 2-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • Auto.

74LVC2G02-Q100 : The 74LVC2G02-Q100 is a dual 2-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • Auto.

74LVC2G04 : The 74LVC2G04 is a dual inverter. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 1.65 V to 5.5 V • Overvoltage tolerant inputs to 5.5 V • High noise immunity • ±24 mA output drive (VCC = 3.0 V) • CMOS low power dissipation • Direct .

74LVC2G04 : The 74LVC2G04 is a dual inverter gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. The gate performs the positive Boolean function: YA Features  Wide Supply Voltage Range from 1.65V to 5.5V  ±24mA Output Drive at 3.0V  CMOS Low Power Consumption  IOFF Supports Partial-Power-Down Mode Operation  Inputs Accept up to 5.5V  ESD Protection Test.

74LVC2G04-Q100 : The 74LVC2G04-Q100 is a dual inverter. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • Automotive product qualif.

74LVC2G06 : The 74LVC2G06 is a dual inverter gate with open drain outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The input is tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. The open-drain output can be connected to other open drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32mA. Features  Wide Supply Voltage Range from 1.65V to 5.5V  -24mA Output Drive at 3.0V  CMOS Low Power Con.

74LVC2G06 : The 74LVC2G06 is a dual inverter with open-drain outputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 1.65 V to 5.5 V • Overvoltage tolerant inputs to 5.5 V • High noise immunity • Complies with JEDEC standard: • JESD.

74LVC2G06-Q100 : The 74LVC2G06-Q100 is a dual inverter with open-drain outputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and .