74LV245

74LV240 : The 74LV240 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT240. The 74LV240 is an octal inverting buffer/line driver with 3-State outputs. The 3-State outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high impedance OFF-state. The 74LV240 is identical to the 74LV244 but has inverting outputs. CONDITIONS CL = 15 pF; VCC = 3.3 V TYPICAL 9.0 3.5 UNIT ns pF pF VCC = 3.3 V VI = GND to VCC1 30 NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in µW) VCC2 fi )ȍ (CL VCC2 fo) where: PD = CPD fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in M.

74LV241 : The 74LV241 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT241. The 74LV241 is an octal non-inverting buffer/line driver with 3-State outputs. The 3-State outputs are controlled by the output enable inputs 1OE and 2OE. CONDITIONS CL = 15 pF; VCC = 3.3 V TYPICAL 8.0 3.5 UNIT ns pF pF VCC = 3.3 V VI = GND to VCC1 30 NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in µW) VCC2 fi )ȍ (CL VCC2 fo) where: PD = CPD fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; ȍ (CL VCC2 fo) = sum of the outputs. ORDERING INFORMATION PACKAGES 20-Pin Plastic DIL 20-Pin Plastic S.

74LV244 : The 74LV244 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC244 and 74HCT244. The 74LV244 is an octal non-inverting buffer/line driver with 3-state outputs. The output enable inputs 1OE and 2OE control the 3-state outputs. A HIGH on nOE causes the outputs to assume a high impedance OFF-state. The 74LV244 is identical to the 74LV240 but has non-inverting outputs. 2. Features and benefits  Wide operating voltage: 1.0 V to 5.5 V  Optimized for low voltage applications: 1.0 V to 3.6 V  Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V  Typical VOLP (output ground bounce) 0.8 V at VCC = 3.3 V; Tamb = 25 C  Typical VOHV (output VOH undershoot) .

74LV244 : The 74LV244 is an 8-bit buffer/line driver with 3-state outputs. The device can be used as two 4-bit buffers or one 8-bit buffer. The device features two output enables (1OE and 2OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. 2. Features and benefits • Wide supply voltage range from 1.0 to 5.5 V • CMOS low power dissipation • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Optimized for low voltage applications: 1.0 V to 3.6 V • Accepts TTL input levels between VCC = 2.7 V .

74LV244-Q100 : The 74LV244-Q100 is an 8-bit buffer/line driver with 3-state outputs. The device can be used as two 4-bit buffers or one 8-bit buffer. The device features two output enables (1OE and 2OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from.

74LV244A : The SN74LV244A octal buffers and line drivers are designed for 2-V to 5.5-V VCC operation. The SN74LV244A devices are designed specifically to improve both performance and density of the 3state memory address drivers, clock drivers, and busoriented receivers and transmitters. These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. Device Information PART NUMBER PACKAGE (PIN) BODY SIZE SN74LV244ADGV TVSOP (20) 5.00 mm × 4.40 mm SN74LV244ADW SOIC (20) 12.80 mm × 7.50 mm SN74LV244ANS SOP (20) 12.60 mm × 5.30 mm SN74LV244APW TSSOP (20) 6.50 mm × 4.40 mm SN74LV244ARGY VQFN (20) 4.50 mm × 3.50 mm 1 1OE Logic Diagram (Positive Logic) 19 2OE 2 .

74LV244A : The 74LV244A is an 8-bit buffer/line driver with 3-state outputs. The device features two output enables (1OE and 2OE). A HIGH on nOE causes the associated outputs to assume a high-impedance OFF-state. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits  Wide supply voltage range from.

74LV244APW : The 74LV244A is an 8-bit buffer/line driver with 3-state outputs. The device features two output enables (1OE and 2OE). A HIGH on nOE causes the associated outputs to assume a high-impedance OFF-state. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits  Wide supply voltage range from.

74LV244AT : The 74LV244AT is an 8-bit buffer/line driver with 3-state outputs and TTL inputs. The device features two output enables (1OE and 2OE). A HIGH on nOE causes the associated outputs to assume a high-impedance OFF-state. Designed to operate over a VCC range from 4.5 V to 5.5 V, the inputs are TTL compatible, which allows the device to be used to translate from 3.3 V to 5 V. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benef.

74LV244AT : ORDERING INFORMATION This octal buffer/driver is designed specifically to improve both the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters. The SN74LV244AT is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. TA –40°C to 85°C ORDERING INFORMATION PACKAGE (1) ORDERABLE PART NUMBER QFN – RGY Reel of 1000 SN74LV244ATRGYR SOIC – DW Tube of 25 Reel of 2000 SN74LV244ATDW SN74LV244ATDWR SOP – NS Reel of 2000 SN74LV244ATNSR SSOP – DB Reel of 2000 .

74LV244ATPW : The 74LV244AT is an 8-bit buffer/line driver with 3-state outputs and TTL inputs. The device features two output enables (1OE and 2OE). A HIGH on nOE causes the associated outputs to assume a high-impedance OFF-state. Designed to operate over a VCC range from 4.5 V to 5.5 V, the inputs are TTL compatible, which allows the device to be used to translate from 3.3 V to 5 V. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benef.

74LV244D : The 74LV244 is an 8-bit buffer/line driver with 3-state outputs. The device can be used as two 4-bit buffers or one 8-bit buffer. The device features two output enables (1OE and 2OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. 2. Features and benefits • Wide supply voltage range from 1.0 to 5.5 V • CMOS low power dissipation • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Optimized for low voltage applications: 1.0 V to 3.6 V • Accepts TTL input levels between VCC = 2.7 V .

74LV245 : The 74LV245 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT245. The 74LV245 is an octal transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions. The 74LV245 features an output enable (OE) input for easy cascading and a send/receive (DIR) input for direction control. OE controls the outputs so that the buses are effectively isolated. CONDITIONS CL = 15 pF; VCC = 3.3 V TYPICAL 7.0 3.5 10 UNIT ns pF pF pF VCC = 3.3 V VI = GND to VCC, note 1 40 NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in µW) VCC2 fi )ȍ (CL VCC2 fo) where: PD = CPD fi = input frequency in MHz; CL = output load cap.

74LV245A : The 74LV245A is an 8-bit transceiver with 3-state outputs. The device features an output enable (OE) and send/receive (DIR) for direction control. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits  Wide supply vol.

74LV245APW : The 74LV245A is an 8-bit transceiver with 3-state outputs. The device features an output enable (OE) and send/receive (DIR) for direction control. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits  Wide supply vol.

74LV245AT : The 74LV245AT is an 8-bit transceiver with 3-state outputs. The device features an output enable (OE) and send/receive (DIR) for direction control. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. The 74LV245AT is designed to operate over a VCC range from 4.5 V to 5.5 V. The inputs are TTL compatible, which allows the device to be used to translate from 3.3 V to 5 V. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. F.