74AUP1G240 Low-power inverting buffer/line driver; 3-state Rev.
7 — 20 January 2022 Product data sheet 1.
General description The 74AUP1G240 is a 1-bit inverting buffer/line driver with 3-state outputs.
The device features an output enable (OE).
A HIGH on OE causes the output to assume a high-impedance OFF-state.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device ensures very low static and dynamic power consumption across the entire VCC range from 0.
8 V to 3.
6 V.
This device is fully specified for partial power down applications using IOFF.
The IOFF circuitry disables the output, preventing the potentially damaging backflow c...

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