74VHC126; 74VHCT126
Quad buffer/line driver; 3-state
Rev.
2 — 6 April 2020
Product data sheet
1.
General description
The 74VHC126; 74VHCT126 are high-speed Si-gate CMOS devices and are pin compatible with Low-power
Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard No.
7-A.
The 74VHC126; 74VHCT126 provide four non-inverting buffer/line drivers with 3-state outputs.
The 3-state outputs (nY) are controlled by the output enable input (nOE).
A LOW-level at pin nOE causes the outputs to assume a high-impedance OFF-state.
The 74VHC126; 74VHCT126 are identical to the 74VHC125; 74VHCT125 but have active HIGH output enable inputs.
2.
Features
• Balanced propagation delays ...