HEF4014B-Q100 8-bit static shift register Rev.
2 — 17 October 2018 Product data sheet 1.
General description The HEF4014B-Q100 is a fully synchronous edge-triggered 8-bit static shift register with eight synchronous parallel inputs (D0 to D7).
It has a synchronous serial data input (DS), a synchronous parallel enable input (PE) and a LOW-to-HIGH edge-triggered clock input (CP).
It also has buffered parallel outputs from the last three stages (Q5 to Q7).
Operation is synchronous and the device is edge-triggered on the LOW-to-HIGH transition of CP.
Each register stage is of a D-type master-slave flip-flop type.
When PE is HIGH, data is loaded into the register from D0 to D7 on the LOW-to-HIG...

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