NPIC6C4894-Q100
Power logic 12-bit shift register; open-drain outputs
Rev.
1 — 17 April 2014
Product data sheet
1.
General description
The NPIC6C4894-Q100 is a 12-stage serial shift register.
It has a storage latch associated with each stage for strobing data from the serial input (D) to the parallel open-drain outputs (QP0 to QP11).
Data is shifted on positive-going clock (CP) transitions.
The data in each shift register stage is transferred to the storage register when the latch enable (LE) input is HIGH.
Data in the storage register drives the gate of the output extended-drain NMOS
transistor whenever the output enable input (OE) is HIGH.
A LOW on OE causes the outputs to assume a hig...