54AC16823, 74AC16823 18-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS243A – APRIL 1991 – REVISED APRIL 1996 D Members of the Texas Instruments Widebus ™ Family D Provides Extra Data Width Necessary for Wider Address/Data Paths or Buses With Parity D Flow-Through Architecture Optimizes PCB Layout D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D EPIC ™ (Enhanced-Performance Implanted CMOS) 1-µm Process D 500-mA Typical Latch-Up Immunity at 125°C D Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Package Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Pin Spacin...

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